It is a test board consisting of clock generator and buffer 4 of the buffered signal go to the DIMM socket while other clock signal go to a reference net. Clock delay and skew can be measured at the SDRAM chips on the module and then compared against the signal at the reference net.
It is for module design verification. It is the supplier’s quality standard to ensure consistent performance. It is an industry reference standard. It allows the tuning of PLL feed back on the module to balance the module timing. It is also an accepted JEDEC industry standard.
It is very easy to use. All you have to do is to connect an external power supply and 2 oscilloscope probes on it. You then turn it on and compare the signal time delay between the 2 signals. Depending on the skew of the clock signals, you will either tune the feedback of the PLL or change the clock loading to balance the skew.
Although this board was designed by IBM; Manufacturing, sales, distribution and after service support is solely responsible by CST, Inc. Call CST, Inc. at (972) 241-2662 for any concern on this product
This Clock Reference Board covers PC100 unbuffered modules, and PC133 registered modules. It has built-in regular clock or spread-spectrum mode. It is built with controlled impedance PC board for tightest performance tolerance. It has a separate Vcc plane that can be used for voltage shmooing test. It has extensive synthesizer de-coupling to assure stability. It also has marked test point for ease of use. All boards are built as one batch against a “golden board” to ensure consistency.
CST, Inc. provides one full year warranty on the Clock Reference Board. Warranty includes parts and labor except the DIMM socket, which considered as a consumable part. Contact (972) 241-2662 for an RMA number.
This Clock Reference Board was designed and tested for the PC100 unbuffered module as well as for the PC133 registered modules. Due to the late release of the PC133 unbuffered DIMM specification, this design cannot guarantee its performance on PC133 unbuffered modules
The Clock Reference Board is intended to be a standard clock timing reference standard. It is not intended nor designed as a memory DIMM tester. However, CST, Inc. does provide full line of DIMM tester that will test most any type of module on the market.
All scope probes has capacitance that can affect the measurement (load down effect). Although a standard 10X probe can do the proper measurement, we do recommend you use an active scope probe that has less than 1pf capacitance loading. In any case, a probe calibration should be performed to cancel out the variation factor from one probe to the other.
The higher bandwidth of the oscilloscope and the less loading of the scope probe will minimize the noise display on the oscilloscope. That is why we recommend the TDS11081C scope and the 1pf active probe.
Although the Clock Reference Board uses a power connector very similar to the standard ATX type power supply, the required voltage is totally different from the ATX power supply. Instead, it requires 3.3Vdc and 2.5Vdc, which are not provided by the ATX power supply. Care should be taken to supply the power from bench power supplies that can be set to the 3.3V and the 2.5V.
The power supply capacity is not a major issue. You should use any bench power supply like B&K, HP…etc. In any case, make sure it is adjusted to 3.3V and 2.5V before connecting or turning on the system
The Clock Reference Board was designed and simulated to be within 100ps of tolerance. Prototype verification on several boards result in variation of 40ps between boards. CST, Inc. does guarantee 100ps tolerance from board to board.
Spread spectrum oscillator is a technique that computer manufacturers use to minimize the EMI from the computer system. The theory is to slight modulate the clock oscillator to allow some of the oscillator energy to spread to its side bands. It is, therefore, reducing the main oscillator frequency radiation. This switch on the Clock Reference Board allows the user to also test the clock skew under the spread spectrum oscillator condition.
Clock skew is measured by comparison of the waveform at the “clock reference net” and the clock signal at the clock pin of the SDRAM. This is best measured with high bandwidth oscilloscope and low capacitance probes.
What is scope probe calibrations?
Just like anything else in the world, scope probes are not made equal nor are they connected equally. Therefore, a calibration is important to remove any ambiguity among the different probes. This is done by connecting the two probes onto the same clock reference source and observe the clock skew between the two readings. This would be your scope probe correction factor. Any further measurement will subtract or add this correction factor for absolute accuracy.
On the PC133 registered module, you can change the value of the feedback capacitor to compensate for the difference. Vary the capacitance value until the skew falls within specification (refer to user’s manual). Unfortunately, you will have to redesign those unbuffered modules by changing the length of the traces on the PCB. Lengthen the clock traces can give you more delay while reducing the length will reduce the time delay.
Although a 500Mhz is the minimum requirement in making the measurement, a higher bandwidth oscilloscope will reduce the noise seen on the scope. Low capacitance scope probe with good comment grounding point will also minimize the noise and give you a clearer picture.
Do not panic. Check your power supply voltage with a DVM. Check all your system connections. Start with a step by step test verification procedure. Use the scope and scope probe to trace the oscillator signals on the board. Also measure the oscillator buffer for input signal and output signals. Determine if the oscillator is dead on the source chip or the buffer chip. Contact CST for help.
The Clock Reference Board circuitry is very simple. However, care must be taken to ensure the integrity of the reference signal is not destroyed. All components are standard except the clock buffer chip. It is specially selected to have all seven outputs balanced to within a tight tolerance. Any replacement of this buffer chip with off-the-shelf component might result in distortion of accuracy
As at the moment, unbuffered PC133 specifications has not been standardized. While VIA Technology has proposed one standard to the JEDEC committee, Intel is formulating another standard. Therefore, it is better to wait till the dust settles down.
The test socket is a consumable part only rated for small number of insertions. Therefore, occasional replacement is needed. However, the design is also based on the particular brand of connector used. This connector is part of the timing simulations during the design phase. Any other model of replacement connector may not result in the same timing delay. Therefore, we would recommend you contact CST factory for any replacement connectors.