Yes - CST is currently developing a new DDR Platform with a seperate 184pin DIMM adapter. The test functions are similar to the SDRAM test functions. The Eureka DDR test solutions will be available Q4 - 2000.
The Eureka is an all-in-one universal memory tester capable of testing SDRAM, DRAM, SRAM, ARAM, Cache and Flash memories with optional test accessories.
Equipped with “High speed test technology” combine with analog pin drivers for voltage changes and a waveform editor for timing parameters adjustment. It provides a leakage test option to detect chips with current leakage problem.
It also has special SIMM Draw Editor, which provides pictorial module layout to pin-point the bad chips, which makes the troubleshooting and diagnosis work a lot easier.
Many other functions such as preheating, test looping, ICC measurement and testing, voltage bouncing and more are available Test memory coverage up to 4 GIGA word and is equipped with 40 bit width data I/O with an option to upgrade to 160 bits. All in all, the Eureka provides close to ATE performance at an affordable price.
The Eureka Tester can be attached to an optional DM718 Automatic Handler and labeler to provide a total hands-free, automated mass production test solution.
A few of the latest adapters built to work with the Eureka are as follows:
– is used for testing all SDRAM Modules. This newly designed 80 bit platform is used to test Synchronous DRAM modules. This SDRAM platform memory module testing is capable of providing precision synchronous clocking, burst mode exercising, interleaving and latency testing , the frequency range is 66Mhz , 100Mhz & 133Mhz . Currently, the available adapters to work with this SDRAM platform are adapters for 168pin / 144pin, unbuffered JEDEC SDRAM module. Other Non Jedec adapters such as 100 pin, 200 pin, 244 pin and 278 pin adapters are also available on the 100mhz platform.
– is used for testing EDO/PAGE MODE DRAM Modules. This is a platform to multiplex the 40 data bits to 160 bits in order to test modules with 64 bits, 72 bits, 80 bits and 144bits and etc. The adapters that work with this platform are the 168 pin DIMM with JEDEC, Apple and SPARC 5 standards, Toshiba 410/610 series, IBM 760 series, SPARC 10/20, JEDEC 144pin SODIMM and etc.
– is used to Test Cache Memory Modules
CST’s cache platform supports the level 2 cache modules for both asynchronous and pipeline burst modes. Its dual voltage generator allows simultaneous testing of both 3.3V cache RAM and 5.0V Tag Ram. There are a few different standards of cache modules depending on the system boards chip sets used. Currently, CST’s has 4 different kinds of adapters to support these various cache modules. EK-Cache1 is for testing modules used with Intel’s Triton and SIS/OPTI chip set. EK-Cache2 adapter is for testing modules used with Intel’s Neptune chip set. EK-Cache3 adapter is for testing the modules used in the Apple Power PC. While EK-Cache4 is for testing the modules used in the DEC computer.
To test the 168 pin DRAM DIMM-EDO, you need the Eureka universal base tester it comes with an optional 160 bit platform and adapter. It is capable to test most 168 pin, 144 pin , 72pin EDO and Page mode DIMM module with a change of adapter.
You cannot test SDRAM DIMM using this adapter. For testing 168pin SDRAM DIMM module, you will require an optional SDRAM2 Platform and adapter. This adapter is capable of testing both the 66Mhz &100Mhz SDRAM DIMM modules at real frequency. 160 bit DRAM Platform adapter and platform is not capable for testing SDRAM DIMM.
The Eureka checks for assembly open and shorts on the module using the “ Walk address” and “Walk data” test pattern.
For more detail testing coverage , the Eureka has “Marching & Checkerboard” test to check for dram cell related faults.
The Eureka can also Auto-Identify most JEDEC standard module, size/capacity, device configuration, access time (speed), parity / non parity/ ECC and voltages.
* The Eureka detect assembly open and shorts on the module using the “ Walk address” and “Walk data” test pattern.
* For more comprehensive detail test coverage , the Eureka has “Marching & Checkerboard” test to check for dram cell related faults.
* The Eureka also Auto-Identify JEDEC standard module for size/capacity, device configuration, access time (speed), parity / non parity/ ECC and voltages.
* Yes, you need to use the 133Mhz – SDRAM3 Platform and adapter, this combination of platoform & adapter will test both the 100 and133Mhz SDRAM DIMM module. A SDRAM3 Platform & 133Mhz label is printed on the adapter casing cover for easy identification.
*You can still also test a 66Mhz SDRAM DIMM module with this adapter, as the frequency on the tester is user selectable from the software.
* Yes, the Eureka uses the PC printer port that can be connected to any printer with a printer cable.
* The fail results will be printed out upon enabling the print function.
* Software allows for management control function with ability to capture and log results.
You can upgrade the tester without a change of the base tester, all you need to purchase is the appropriate test platforms and adapters with to the base tester.
You can download the latest software from the Internet.
Yes , the Eureka is capable of testing both DRAM chips and SDRAM chips For DRAM chip testing, you will require the EK-SOJ DRAM adapter use with the 160bit DRAM Platform. For SDRAM chip, you will require the TSOP SDRAM chip adapter used with the SDRAM2 Platform.
If you are using SDRAM1 platform with SDRAM1 Adapter – you will face some problem testing PC100 & PC133 Modules.
The SDRAM1 was design for testing 66Mhz or PC66 SDIMM only – using this platform to test PC100 or PC133 DIMMs will yield incorrect test results.
To test PC133/PC100 SDRAM DIMM – you need to use EK-SDRAM2-Platform with EK-SDRAM2-Adapter or EK-SDRAM3-Platform with EK-SDRAM3-Adapter to correctly identify a PC133/PC100 DIMM module. The SDRAM2 Platform can be also used to test PC66 SDIMM.
To test PC133 SDRAM DIMM – you need to use the latest SDRAM3 platform and SDRAM3 Adapter to correctly identify a PC133 DIMM module. The SDRAM3 Platform can be also used to test PC100 & PC66 SDIMM.
For DRAM module testing , if the Eureka fail the following test :
Walk Address Failure - checks and detect open/short on address pins and bad address decoder.
Walk Data Failure - checks and detect open/short on data bits
Marching Failure – checks and detect bad cells and decoder interaction problem
Checkerboard Failure – checks and detect for bad cells, decoder interaction problem.
Leakage Failure ( Optional) – checks and detect one and shorts on all control an data pins, and memory cell leaks.
Pre-heat Test Failure– checks and detects reliability during chip warming –up.
Voltage bouncing test – check and detect modules with noise related problem
Loop Test Failure– to simulate module burn-in situation
For SDRAM Testing:
In addition to the above patterns, the following are found only in SDRAM testing mode :
Burst test failure - checks for faulty chip that fail to read and write during consecutive clock cycles.
Chip select test - checks for assembly shorts and open on the CS pins
DQM failure test - checks for shorts and open on the SDRAM chip input and output masking ability
WP fail test - check for module that is PC-100 Intel compliance.
*If your module is a known good module that works on the computer- but fail on the Eureka, it might be caused by a worn out test socket , defective test adapter, or a Calibration is due.
Contact CST for an RMA number if you have tried all the above.
Occasionally you might chance upon certain modules that the tester identify as eg 64ns instead of 60ns, this can be caused by several factors:
Signal degradation due to the chip loading effect on the SIMM or DIMM module, the result only happen to one or two types of module, typically with a sizable amount of chips mounted on board.
If the timing is consistently high irregardless of type of module, then contact CST for RMA number to have your tester checked out.
* If the “SPD data test” is selected in the test pattern , the tester will perform a SPD read and write comparison after functional test.
* If the original SPD data store in the tester buffer does not match the programmed SPD – the tester will fail “ SPD Data Test”. Ensure the SPD write compare enable function is enable from the” SPD Edit function”.
* Certain SDRAM DIMM modules are assembled with preprogrammed SPD EEPROM which are software write protected, you will not be able to reprogrammed this type of EEPROM again. Check with your supplier if you are not sure.
* Solder shorts on the SPD pins could also result in “Fail SPD Test”, perform a visual inspection on the SPD EEPROM leads.
* A defective EEPROM which is incapable of data retention – will also fail “SPD data test” . Try rewriting the SPD several times and it still fail- replace a new SPD EEPROM chip.