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Wednesday, October 31, 2018
Industry News
TSMC projected to tape out 5nm by April 2019 10/8/2018
TSMC taped out its first chip in a process making limited use of extreme ultraviolet lithography and will start risk production in April on a 5-nm node with full EUV.
U.S. jobless rate dropped to 3.7 percent — lowest since 1969 10/5/2018
Average hourly earnings up 2.8 percent from a year earlier. The economy has now added jobs for nearly 8 straight years.
Xilinx offers AI accelerator card 10/5/2018
According to the company, customers can expect breakthrough performance improvement at low latency when running key data centre applications like real-time machine learning inference as well as video processing, genomics, and data analytics, among others.
TSMC ramps 7nm with EUV layers 10/5/2018
TSMC announced that it taped out a customer chip in an N7+ node that can use EUV on up to four layers. EUV aims to lower costs by reducing the number of masks required for leading-edge designs.
New flash production line at SK Hynix 10/5/2018
The company said the new M15 line in Cheongju, covers some 60,000 square meters and will play a key role in bolstering the competitiveness of South Korea's chip industry as a whole.
Updated memories configurations spec. now available on JEDEC.org 10/4/2018
JESD21-C, JEDEC Configurations for Solid State Memories, is a compilation of some 3000 pages of all memory device standards for solid state memory including DIMM, DRAM, SDRAM, MCP, PROM, and others from September 1989 to present.
Winbond breaks ground for it new memory fab. 10/4/2018
“The investment is the largest scale in the history of the park in Kaohsiung’s Lujhu District, surpassing all capital that has been invested over the past 15 years,”
Stalled trade growth affects economy at Eurozone 10/4/2018
Slowdown is set to continue into the fourth quarter as "recent months have seen a clear loss of momentum in terms of both output and new order gains."
North Korea steals from banks globally 10/4/2018
North Korean group has stolen hundreds of millions of dollars by infiltrating the computer systems of banks around the world since 2014 through highly sophisticated and destructive attacks that have spanned at least 11 countries.
Cadence collaborates with TSMC to certify its 5 and 7nm design solutions 10/3/2018
Cadence digital and signoff tools optimised for TSMC’s 5nm and 7nm+ process are designed to provide EUV support at key layers and associated design rules that enable customers to achieve power, performance and area (PPA) savings at these advanced nodes.
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