| Q. | If a SDRAM DIMM module is assembled with a -10 SDRAM chip, is it considered PC100 compatible?
No - An SDRAM DIMM with -10 (100 MHz) chip will support only 66 MHz Systems. This type of module is not guaranteed to run consistently in a PC100, 100 MHz system.
In order for the module to be PC100 compatible the components need to be marked with -8A, -8B, -8C, -8D or -8E (or 125 MHz)and example taken from micron chips.
Micron Modules with -8A through -8C sdram chips will run at 100 MHz at a CAS latency of 3.
Modules with -8D or -8E components will run at 100 MHz at a CAS latency of 2.
Refer to the original manufacturer data sheet to determined the correct CAS latency setting.
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| Q. | Are PC133 speed-tested SDRAMs backward compatible with PC100?
Yes. The AC timing specifications on a PC133 device are tested to allow a system bus to run at 133 MHz.
The PC100 and PC66 timing specifications are more relaxed on these timings.
Majority of PC133 chips should work at PC100 and PC66. In fact, a -75 device is specified for PC100 timings using CAS latency = 2.
Please refer manufacturer data sheet for AC timing table in the appropriate data sheet tCK at CL = 2. |
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| Q. | Several Memory module suppliers are offering PC133 modules with a performance setting of 3-2-2. What advantage does a 2-2-2 module provide?
The first number of the 2-2-2 designation refers to CAS latency, so in short you are asking the advantage of a CAS latency of 2 over one of 3.
Adjusting a device to CL = 2 from CL = 3 will speed up access time from a READ command to the point at which data is available on the data bus (1 clock quicker).
Base on benchmark testing results, better performance improvements were found in the 2-2-2 setting over the 3-2-2: |
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| Q. | What is the difference between 72 bit and 64 bit memory and between 32 bit and 36 bit memory?
72 bit memory is commonly known as ECC memory. It has an additional 8 bits for Error Correction Check 64 bit memory is non-ECC. 72 bit or 64 bit configuration are typically found in 168 pin DIMMs
36 bit memory is commonly known as parity memory. It has an additional 4 bits for parity checking. 32 bit memory is non-parity. 32 bit or 36 bit configuration are typically found in 72pin or 30 pin SIMMs |
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| Q. | What's the difference between 2K and 4K SDRAM?
In Short : not much, don't worry about it.
Well the truth is :
The SDRAM has multiple internal banks. The 16M SDRAM has 2 banks, the 64M has 4 banks. When you tell the SDRAM a ROW or COLUMN address you must also specify which BANK you are referring to. The way to do this is by the 'bank address' (BA). Herein lies the problem.
For some unknown reasons, suppliers have lumped together the ROW address pins with the BANK address pins and simply refer to them as 'address' pins. For the 2Mx8 SDRAM some suppliers claim to have 11 ROW address plus 1 BA, other just say 12 addresses. That's just addressing, for refresh requires you also specify the refresh interval (tREF). For a distributed refresh scheme you simply divide tREF by the number of refresh cycles to get the auto-refresh interval. In both cases for the SDRAM it works out like:
Address bits Refresh Cycles tREF Auto-refresh interval
11 row 2^11 = 2048 = 2K 32ms 32ms / 2048 = 15.6 us
12 2^12 = 4096 = 4K 64ms 64ms / 4096 = 15.6 us
The upshot is that for distributed refresh schemes these two devices are identical in both addressing and refresh. (For a burst refresh scheme, the 32ms tREF is a subset of the 64ms.)
For the general PC application the 2K device works fine. The 4K device offers no advantage. Note that this is not the case for asynchronous DRAM where there truly is a difference in addressing between 2K and 4K. |
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| Q. | What's the difference between buffered and unbuffered DIMMs?
High density DIMMs have lots of chips on them and therefore possess a higher capacitive load on the address and control signals in comparison to lower density DIMMs. Some designers use re-drive buffers on the DIMM to boost the signals to reduce system loading when compared to the same high density module without buffers. But,
the buffers introduce a small delay into the electrical signal, so adding buffers to a standard density module would have the effect of slowing down the signal, compared to the same low density module without buffers. |
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| Q. | What is CL or CAS Latency?
| CL stands for CAS Latency. It is a programmable register in the SDRAM that sets the number of clock cycles between the issuance of the READ command and when the data comes out. Smaller number for CL indicates faster SDRAM within the same frequency. |
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| Q. | Can you tell by looking at a module if it is SDRAM, FPM, EDO etc?
| SDRAM, EDO and FPM chips look similar to each other. The best way to tell the difference is to reference the part number on the chip. Most DRAM manufacturers have reference books or lists on their web sites. By looking at a memory module one can attempt to guess what it is. A general guideline is to look at the IC type and size. The EDO and FPM chips are typically packaged in SOJ form and are thicker when compared to that of the SDRAM chips which are typically packaged in slim-line TSOP form. The EDO/FPM chips typically have a marking of -60 at the end of the string of numbers and that of the SDRAM chips typically have markings of -12 -10 -8 -7.5. A SDRAM module typically has a row of the resistor or resistor arrays above the contact tabs. |
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| Q. | What is refresh rate and self refresh?
A memory module is made up of electrical cells. The refresh process recharges these cells, which are arranged on the chips in rows. The refresh cycle refers to the number of rows that must be refreshed.
The common refresh cycles are 2K, 4K and 8K. Refresh cycle together with refresh period determines how often refresh is needed, which is defined as Refresh Rate.
For the same refresh period, 4K refresh parts needs to be refreshed more frequently than 2K parts. For the same size DRAM, 4K refresh part consume less power than 2K refresh parts.
Some specially design DRAMs feature self refresh technology, which enables the components to refresh on their own -- independent from the CPU or external refresh circuits.
Self refresh, which is built into the DRAM itself, reduces power consumption, and it is commonly used in notebook computers |
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| Q. | What is the performance difference between EDO DRAM and standard (Fast Page Mode) DRAM?
| EDO DRAM speeds up memory transactions by as little as 5% or by as much as 25% over conventional DRAM, depending upon how much Cache you have on your motherboard. Less Cache on the motherboard will result in a larger speed increase when adding EDO DRAM. EDO eliminates a wait state between the execution of sequential-read commands from memory, giving the CPU significantly faster access to memory. |
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| Q. | What happens if my memory is not PC-100 compliant?
| It means you may experience system errors in a 100mhz system because the memory's performance cannot keep up with the system requirement. The system will operate at the speed of the slowest component. For example, installing 66MHz SDRAM memory in a PC-100 system will cause the bus to operate at 66MHz, rather than the speed it was designed to operate at. |
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| Q. | How can I recognize compliant PC100 or PC133 SDRAM memory?
| A PC100 or PC133 compliant memory includes a label affixed to it which identifies the module as "PC100 compliant" or "PC133 compliant" . An attempt can be made to verify it by looking at the chip marking which should indicate "-8" or "-7.5" after the string of manufacturer part number, though this may not be entirely accurate. |
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| Q. | What voltage is SDRAM?
| SDRAM specifications state that all SDRAM has to be 3.3V. |
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| Q. | What is the difference between "2-clock" and "4-clock" SDRAM?
The early SDRAM DIMM design has 2 clock inputs to drive all the SDRAM chip. This was found to be insufficient due to loading on these inputs. Some 4 clock modules will not work in systems that are designed for 2 clock, but some will. SOME 2 clock modules might not work in systems designed for 4 clocks, but then again some will.
4 clock modules are the current standard and it is unlikely to change again.
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| Q. | What is PC SDRAM, PC100 SDRAM and Registered SDRAM?
PC SDRAM is a loose general term for SDRAM that runs at 66 MHz and has an SPD chip for compatibility with P-II motherboards.
PC100 SDRAM refers to PC100 SDRAM chips or DIMMs that meet INTEL PC100 qualification standard. These parts are designed to run at 100 Mhz front side bus (FSB) speeds.
Registered SDRAM - This is SDRAM module with Register for Address and Control Signals. Registered DIMMs reduce the loading of DIMM to the motherboard so that larger capacity DIMM modules and more DIMMs can be populated on a motherboard.
It is a technique used widely on servers to increae the amount of memory the system can support. The Registered DIMM is a little slower in access timing versus that of the unbuffered counterpart. |
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DRAM? SDRAM?
