The device consists of four 512 megabit DDR2 DRAMs that total 2 gigabits. Samsung said it can make up to 4 gigabyte DIMM with the new approach, which reduces package size and power draw. The company did not provide specific metrics.

"The performance advancements achieved by our (wafer scale package) technology can be utilized in many diverse combinations of semiconductor packaging, such as system-in-package solutions that combine logic with memory," said Tae-Gyeong Chung, vice president of Samsung's Interconnect Technology Development Team.

Samsung did not indicate a commercial schedule for introduction of the device. But news of it comes shortly after IBM Corp. said it will sample its first commercial devices to make direct metal connections between chips this year.