To allow mobile chipset providers to reduce component complexity and lower manufacturing costs for next- gen mobile phones, laptops and other portable communication devices, IBM Corp. today unveiled CMOS 7RF silicon on insulator (SOI), a semiconductor manufacturing process aimed at allowing single-chip radio frequency (RF) devices through the integration of multiple RF/analog functions such as multi-mode/multi-band RF switches, complex switch biasing networks, and power controllers.

As this process technology evolves, IBM said it expects it to create additional integration opportunities such as filter, power amplifier, power management and receiver/transmitter functions, which are cost-prohibitive or technically unfeasible with semiconductor technology used in mobile devices today.

The 180-nm CMOS 7RF SOI process technology is tailored for RF switch applications that provide a low-cost alternative to solutions based on gallium arsenide (GaAs). 

IBM’s SOI technology promises to minimize insertion loss and maximize isolation to help avoid issues such as loss of signal or dropped calls, potentially enabling significant cost advantages to mobile handsets. 

As part of a solution for mobile chipset providers, IBM offers engineering and go-to-marketing services to help customers solve challenges related to component design and manufacturing. Initial hardware evaluations have been completed with general availability for design kits planned for the first half of 2008.

In other news, IBM, along with its Common Platform partner Chartered Semiconductor Manufacturing Ltd. is collaborating with Chip Estimate Corp. to consolidate information on semiconductor intellectual property (IP) that supports Common Platform technology. The Common Platform web site is also linked to the ChipEstimate.com chip planning portal, the companies noted.

The Common Platform IP Portal hosts a catalog of 90-, 65- and 45-nm IP that has been developed to allow electronics engineers to access multiple sourcing capabilities offered by the Common Platform technology alliance, and links to data on semiconductor IP, including component features, deliverables, quality and status in silicon, connecting designers directly to IP suppliers.

Walter Ng, senior director of platform alliances at Chartered explained that the foundry is working with Chip Estimate to make it easier for customers to identify qualified IP and make informed decisions that will mitigate their risk and help them get to market sooner.

By: DocMemory
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