Texas Instruments is demonstrating a 5Gbit/s transceiver test chip at next week's USB Developers Conference in Tokyo, Japan.

TI says the test chip will speed the implementation of the emerging SuperSpeed USB 3.0. specification.

The test chip, designed to the USB 3.0 specification version 1.0, was designed to drive and receive signals over 4-m USB 3.0 cables to ensure data integrity.

The SuperSpeed USB interface, released last November, runs at up to 5 Gbits/s and can deliver as much as 300 Mbytes/second of data at the application layer.

TI said the device has already been tested with Synopsys' intellectual property (IP) digital controller at the USB-IF SuperSpeed Peripheral Interoperability Lab.

The first in TI's SuperSpeed USB family of devices, the TUSB1310 transceiver, will sample in the fourth quarter of this year, with volume production expected in 1Q 2010. Evaluation modules will also be available to interface the TUSB1310 to a variety of processor and FPGA implementations.

The transceiver has an integrated spread spectrum PLL to support multiple input reference frequencies, including 20 MHz, 25 MHz, 30 MHz and 40 MHz as well as PIPE3 and ULPI compliant interfaces.

By: DocMemory
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