Chinese silicon foundry Semiconductor Manufacturing International Corp. (SMIC) announced the availability Friday (May 15) of a set of 65-nanometer low leakage process IPs, including the preliminary version release of six memory compliers.
The portfolio consists of a number of new, ready-to-use IPs, follows the 65-nm standard cell libraries that were released by SMIC (Shanghai) earlier this year, the company said.

The centerpiece of the offers is the memory compilers, which enable the intelligent and rapid generation of memory blocks in bulk and on the fly, according to SMIC. The compilers include memories optimized for high performance and also optimized for performance and area, the firm said.

The 65-nm library was developed in-house by SMIC, the firm said, and offers advantages in flexibility and customizability, allowing for the library to be tuned to processes and recharacterized according to customer requests, streamlining the design flow and improving time to market, SMIC said.

Scheduled production release of the memory compilers is slated for June 30. Additional in-house and third-party 65-nm IPs are under development, and should be available to customers later this year, SMIC said.

By: DocMemory
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