The chips are a 4-Gbit array with 3-bits per memory cell providing a memory capacity of 32-Gbits. The chips will be used in NAND flash modules accompanied by Samsung 3-bit NAND controllers to initially produce 8-Gbyte micro Secure Digital (microSD) cards.

Samsung introduced a 50nm-class, 16-Gbit MLC NAND memory device in 2007.

Samsung also announced the mass production of its 32-Gbit NAND memory with an asynchronous DDR (double data rate) interface, which reads at 133-Mbits per second, The memory is set to replace single data rate (SDR) MLC NAND, which has an overall read performance of 40-Mbps.

"With the new DDR MLC NAND, double data rate transmission can be achieved without increasing power consumption, giving designers a lot more latitude in introducing diverse CE [consumer electronics] devices," said Soo-In Cho, executive vice president and general manager of the memory division at Samsung, in a statement.

By: DocMemory
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