Pipelining increases a processor's speed by performing multiple operations in sequential stages simultaneously—like the stages an automobile goes through on an assembly line. And just as multiple cars are on an assembly line, so do multiple instructions ripple through the pipelined stages of the processors used for mobile devices.

Unfortunately, though today's pipelines improve performance, they also introduce unnecessary redundancies such as repeatedly loading registers. According to FSU professors David Whalley and Gary Tyson, their static pipelining technique can cure these issues.

"Instead of pipeline registers, we have internal registers that are directly referenced and controlled by the statically pipelined instructions," said Walley.

Statically pipelined instructions give explicit control over every part of a processor to each instruction, in effect expending less energy to achieve the same results.

"Static means information goes through the processor based on the instructions that are determined once at compile-time, rather than each time instructions go through the pipeline dynamically," said Whalley. "Each instruction is fetched in one cycle and then controls the entire processor in a subsequent cycle for a static pipeline."

Along with the lower power benefit, static pipelining also enables less complex design methods and lower production costs, according to the researchers.

The long-term goal of the FSU professors is to optimize the performance of mobile processors to the point of enabling ant-sized devices capable of extremely long battery lifetimes, such as next-generation pacemakers that do not require periodic surgeries to change their batteries.

By: DocMemory
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