Toshiba has developed a 3-bit-per-cell 128Gb chip, which entered mass production using the company's 19nm process technology earlier in February 2012.

Toshiba said that the new 3-bit-per-cell 19nm generation device uses a three-step programming algorithm and air-gap technology for transistors, effectively reducing coupling between memory cells down to 5% and achieving a write speed performance of 18MB/s.

Toshiba indicated it has also optimized the peripheral circuit structure of the chip, securing a 20% reduction in area from current chips.

Toshiba added the 128Gb NAND flash memory chip had been jointly developed with partner SanDisk.

"The 128Gb semiconductor device has an industry-leading X3 write performance of 18MB per second. This level of performance is achieved using SanDisk's patented advanced all bit line (ABL) architecture and means that X3 technology could be extended to certain product categories that use MLC NAND flash memory," SanDisk said in a statement. The firm will present a technical paper outlining the breakthrough at the International Solid-State Circuits Conference (ISSCC) in San Francisco.

By: DocMemory
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