Achronix Semiconductor Corp. said Wednesday (Feb. 20) it is now sampling its first 22-nm FPGAs, the first chips built by Intel Corp. for the programmable logic startup.

Although Achronix is delivering the first samples of its Speedster 22iHD1000 FPGAs about four and a half months later than originally planned, some customers--presumably in the telecommunication, networking, test and measurement and high-end computing fields--have been working on designs that will feature the chip for nine months, according to Robert Blake, Achronix president and CEO. The company expects OEM systems featuring the 22-nm FPGAs to reach the market in the second half of 2013.

Achronix (San Jose, Calif.) made a big splash in 2010 when it announced it would use Intel as a foundry partner. It was the first publicly announced foundry deal for the world's biggest chip maker, which builds the Achronix chips using its advanced 22-nm, 3-D tri-gate transistor technology.

“The delivery of the first Speedster 22i FPGAs is an important milestone in a multi-year strategic relationship Achronix,” said Sunit Rikhi, vice president and general manager of Intel’s custom foundry business.
 
Blake acknowledged that the company’s decision to be Intel’s firs foundry customer wasn’t easy. Potential risks and concerns among its engineering team were far and wide. They included such issues as restarting the company’s design process, learning new development tools, acquiring new IP, increasing development costs and possibly delaying product introductions. However, in retrospect, it was “absolutely the right decision,” said Blake. Intel, he added, “catapults us ahead of our competitors” with its 22-nm process technology. Achronix believes that at the 20/22-nm process node, Intel is almost two years ahead of either TSMC or Globalfoundries.
 
Another advantage in going with Intel is that 100 percent of manufacturing of Achronix FPGAs is done in the United States, as Intel operates wafer fabrication in Oregon and packaging and device testing in Arizona. “For our customers in the military and aerospace industry, 100 percent Intel manufacturing in the U.S. means protecting security,” said Blake.
 
But the biggest upside for Achronix came when Intel offered IPs, including high-speed general purpose input/output (GPIO), serializer/deserializer (SerDes) used in high-speed communications, embedded memory blocks and PLLs. By using these hardened IPs as cell-based logic around its FPGA, Achronix was able to save area, reduce power consumption by half, and cut cost and design time similarly, Blake explained.

Blake cited the example of a DDR 3 memory controller embedded on Speedster 22iHD1000. “Closing the timing on DDR 3 memory is one of the hardest things," Blake said. "Now that this is embedded as a cell-based logic on the FPGA, designers need not worry about spending time on plumbing.”
 
While area and power savings in the Achronix FPGA may be clear when compared to the general-purpose FPGAs, true competitors for Speedster 22iHD1000 are more likely to be ASIC or custom chips designed for networking and telecommunication equipment. Because it’s designed as an ideal FPGA for connectivity for high-bandwidth applications, Achronix will need to pick its spots when pitching Speedster 22iHD1000
 
In certain applications, ASICs could be smaller and run at less power, compared to Speedster 22iHD1000, Blake acknowledged. But, he said, “They offer no flexibility when it comes to adding new features or customization.” In the end, he said, this would offer OEMs little advantage in time and cost.
 
Breaking the FPGA market into three categories–low-, mid- and high-end--Blake noted that Achronix FPGAs are for the high-end market with special focus on high-bandwidth applications. They include: 200 gigabit line card, systems for the test space, and high-performance computing area.
 
Achronix offers a development kit for the Speedster 22i HD1000, including a PCI Express form-factor, HD1000 development board, Achronix CAD environment (ACE) software, programming pod and power supply.  The kit including ACE software is immediately available for $13,000.
 
Asked what caused the four and half month delay in the Speedster launch, Blake pointed to the complexity of the most advanced technology FPGA (over 6 billion transistors) and working with a new supplier. Calling the delay “a normal engineering development process,” Blake stressed, “With the extra time, we gained back in verification and performance of the chip.” Achronix claims that the HD1000 is exceeding expectations in initial device testing time, faster SerDes and lower power.

By: DocMemory
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