Samsung  has begun mass producing 3D vertical NAND (V-NAND) flash memory chips, designed for a wide range of consumer electronics and enterprise applications such as embedded NAND storage and solid state drives (SSDs), according to the company.

Samsung's 3D V-NAND offers a 128Gb density in a single chip, utilizing the company's proprietary vertical cell structure based on 3D Charge Trap Flash (CTF) technology and vertical interconnect process technology to link the 3D cell array. V-NAND is also able to provide over twice the scaling of 20nm-class planar NAND flash.

Conventional flash memory has long been based on planar structures that make use of floating gates. As manufacturing process technology has proceeded to the 10nm-class and beyond, concern for a scaling limit arose, due to the cell-to-cell interference that causes a trade-off in the reliability of NAND flash products. This also led to added development time and costs.

Samsung said the new V-NAND solves such technical challenges. In Samsung's CTF-based NAND flash architecture, an electric charge is temporarily placed in a holding chamber of the non-conductive layer of flash that is composed of silicon nitride (SiN), instead of using a floating gate to prevent interference between neighboring cells. By making this CTF layer three-dimensional, the reliability and speed of the NAND memory have improved sharply.

Samsung noted that its proprietary vertical interconnect process technology can stack as many as 24 cell layers vertically, using special etching technology that connects the layers electronically by punching holes from the highest layer to the bottom. With the new vertical structure, Samsung can enable higher density NAND flash memory products by increasing the 3D cell layers without having to continue planar scaling, which has become incredibly difficult to achieve.

After nearly 10 years of research on 3D vertical NAND, Samsung now has more than 300 patent-pending 3D memory technologies worldwide, the company claimed.

By: DocMemory
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