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Xilinx unveil 20nm chip


Thursday, December 12, 2013 Xilinx has announced that it began to ship its first 20nm silicon in early November 2013, continuing to execute on an aggressive UltraScale device rollout. The new devices, which are manufactured at Taiwan Semiconductor Manufacturing Company (TSMC) using a 20nm process node, are built on ASIC-class programmable architecture coupled with Xilinx Vivado ASIC-strength design suite and UltraFast design methodology, according to Tang Liren, CEO of Xilinx Asia-Pacific. The new offerings also extend Xilinx's Kintex and Virtex FPGA and 3D IC families, based on the UltraScale architecture and the superior gate density of TSMC's CoWos (chip on wafer on substrate) process, said Tang, adding that the new portfolios can serve as alternative solutions for other ASIC and ASSP devices. Xilinx has no plans to add any new suppliers and expects its business relationship with TSMC to continue, extending the cooperation from 28nm process to 20nm and 16nm FinFET processes, Tang remarked.

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