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SK Hynix announced high bandwith memory (HBM)


Thursday, July 9, 2015

We at TechInsights have been on the hunt for Hynix’s high bandwidth memory (HBM) for the last few months and we finally have one in our lab.

Hynix’s high bandwidth memory (HBM) is new and it addresses the bandwidth limitations seen with DDR4 type SDRAM and to some extent DDR5. The technology involves stacking four DRAM dies and a logic die, one on top of the other, with die to die connections being made using through silicon vias (TSVs) and microbumps.

Figure 1 shows the stack of four DRAM dies and logic die affixed to an interposer die. The interposer is used as a routing layer to connect the DRAM to a processor, and to connect the processor to an underlying package substrate.

Figure 1: Schematic cross section of HBM module. (Source: AMD HBM brochure, TechInsights)
Figure 1: Schematic cross section of HBM module.

By: DocMemory
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