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IP in advanced semiconductors should bring excitement in 2016


Monday, January 4, 2016

Commercial IP has become a universally accepted mainstay of modern SoC design. It is hard to imagine how most of today’s leading electronic platforms could happen without the high-quality processors, DSPs, bus fabrics, DDR controllers, memory macros, standard cells, I/O controllers, high-speed PHYs and key analog interfaces supplied by a wide ecosystem of IP builders. Does that mean that 2016 is just more of the same, everyone creep at little more up and to the right? Yes and no.

We know what to expect from the global electronics innovation cycles—more density, more chips, more industry standards, more IP blocks, better tools and continued intense pressure of price, power, performance and differentiation. But is that it? Is that what innovation is all about? I think not. In 2016, we should expect the unexpected.

Let’s look at four related areas:

IP and IoT

Internet of Things (IoT) has been all the rage over the past two years, but the industry is starting to sort out what kinds of products make sense. Consumer IoT gets the most attention, but a lot of the early “wearables” are gathering dust in the top dresser drawer. Transportation and commercial production applications of IoT—telematics to gather information from vehicles, farms and factories, for example—are taking off more quickly, but perhaps not driving the breathtaking volumes seen in some IoT hype. IoT maturation and growth will drive semiconductor in particular ways. I picture three rough categories.

The bottom slice of the market as low sample-rate sensors, low duty cycle and comparatively simple software in the device. Basic IP for microcontrollers, analog interfaces, low-bit-rate wireless modems, on-die RAM and flash, and simple security will satisfy these chip needs. There may be lots of unit volume, but the needs may be so generic that the number of unique designs may not be huge.

A middle tier of platforms will support higher sample rate interfaces, including microphones, multiple motion sensors and higher-performance wireless. These designs will often deploy significant DSP cores alongside of the microcontrollers, stacked DRAM and flash die for storage, richer radios and more wired connectivity. The units per design may be fewer, but the number of unique designs will grow to satisfy the diverse, but challenging functionality.

The top-tier IoT platforms will be the most demanding—they will support the rapidly growing use of cameras in IoT to understand the environment, to recognize people and to detect patterns of activity. Image-centric platforms will drive orders of magnitude higher bandwidths at every level—in computing, in memories, in wired connectivity and in back-haul to the cloud. And the IP will be different—higher-end CPUs, widespread use of vision DSPs, advanced DDR interfaces and very-high-speed wireless LAN and cellular modems. These top-tier platforms will also place the biggest demands on IP robustness, including support for functional safety, system redundancy and recover, performance monitoring and in-the-field secure upgradability.

Consumer convenience IoT will drive more unit volume, but the valuable IP will be pushed most intensively by the “heavy-lifting” IoT applications.

IP and vision

The theme of vision coming to IoT carries through across almost every end-use segment of semiconductors. Surveillance and automotive vision is the most obvious, as vision for people tracking, collision avoidance, adaptive lane tracking and surround view will become nearly universal over the next five or six years. But vision will quickly transition into unexpected places. Mobile phones and tablets will adopt true visual recognition for augmented reality and enhanced social networking. Consumer devices will use vision for user recognition, gaze tracking and gesture control. Industrial applications will use it for inspection and monitoring. Over this period, it may be easier to list the products that don’t adopt vision in some form.

The adoption of visual systems will be most direct on vision processor and GPU cores, but the impact of vision will influence on-chip interconnect, DDR and flash controllers and high-speed serial interfaces like USB and PCI Express (PCIe).

IP and Neural Networks

Perhaps the most unexpected transformation in system architecture will be the rapid spread of neural network computing for a wide range of embedded systems. Neural networks are revolutionizing image recognition, voice input, network traffic analysis, natural language interpretation and other kinds of real-time big-data applications. The huge computing and bandwidth requirements of neural networks—implementing the robust, layered, retrainable, digital equivalent of animal brain functions—will require a quantum leap in IP efficiency. Specialized neural computing cores will need to exceed one trillion floating-point or integer multiplies per watt. Compared to today's processors and GPUs, that's an energy-efficiency level that is better by more than a factor of 20. Corresponding improvements in bus fabric bandwidth, multi-core support and memory bandwidth will open up opportunities for entirely new IP categories.

IP and Moore’s Law

It is safe to predict that Moore’s Law will be declared dead yet again in 2016. But I can also safely predict that the “corpse of Moore’s Law” will continue to produce steady improvements in density, cost and energy efficiency as we move to 7nm and below. True, the super-dense SoC designs on leading-edge nodes will get more expensive to build, but they will also get more programmable and more scalable. This, in turn, will shift the biggest part of the investment for these silicon-rich platforms over to software. These software-driven architectures will exploit the inherent advantages in speed of evolution and adaptability to new technical demands and new business models. The unexpected role for IP in the unexpected longevity of Moore’s Law is two-fold. First, the IP will be increasingly application-centric, built to solve not just building-block needs, but to encompass the essential computation, interface and communication of the end-system features. Second, the IP will be software-rich, with verification environments, APIs, drivers, libraries and applications, including third-party applications, wrapped around the hardware IP to increase convenience and performance and reduce time-to-market, risk and energy.

By: DocMemory
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