Flash memory is back on the Moore's Law scaling curve, according to Micron Technology Inc. (Boise, Idaho) thanks to its move into three-dimensional structures.

"3D gets NAND back on a regular scaling curve," Kevin Kilbuck, Micron’s director of NAND Strategic Planning told EE Times. "Our first generation is 32 layers in the vertical direction while relaxing the x-y design rules back several generations."

Prior to going 3D, Micron could only shrink each new generation in its x-y dimensions, but they hit the wall at 20-nanometers, only able to shrink in one direction—either x or y—at the 16-nanometer node. But by going 3D, Micron has been able to keep increasing chip capacity per package while relaxing the x-y scaling rules. Relaxing the x-y design rules improves the performance and reliability compared with sub-20nm planar NAND.

"As you approach the x-y scaling limit, you start running out of electrons and get a lot more interference," Kilbuck told us. "Going 3D solved that problem for us, while still keeping the packages in the 1.0-to-1.4 millimeter range with the same pinout."

In its fabs in Singapore and Lehi, Utah (half-owned by Intel) Micron's first generation 3D NAND chips will be 32- and 48-gigabytes. With up to 16 layers in a single package super high density solid-state drives (SSDs) can be made for servers and data centers. For the future, Micron plans 2-terabyte 3D NAND packages, allowing an SSD using 16 of them to pack up to 32-terabytes.

"Our solution is the first 3D NAND technology built on a floating gate cell," Kilbuck told EE Times. "It also has an architecture enabling industry-leading monolithic MLC and TLC die. Unlike competitive solutions, our first-generation 3D NAND is architected to achieve better cost efficiencies than planar NAND.

By: DocMemory
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