Tuesday, June 14, 2016
Embedded FPGA intellectual property developer Menta is offering embedded programmable logic as both custom and pre-defined IP cores based on its eFPGA fabric.
Already available for TSMC 28nm HPM and STMicroelectronics 28nm FDSOI process technologies, the IP is now available for GlobalFoundries 14nm LPP process.
Menta’s eFPGA technology was demonstrated this week at the Design Automation Conference in Austin, Texas.
One benefit of embedding an FPGA fabric as an IP core in a chip, says Menta, is that it allows designers to update the silicon at will post production, without re-spinning silicon.
According to Yoan Dupret, who is in charge of business development at Menta:
“The boost in performance and support of additional process nodes with our next generation of eFPGAs will bring the benefits of post production RTL modification to a wider range of applications.”
The company says it has also optimised performance, area usage, and lower power consumption.
“For example, on a circuit with 15k equivalent programmable logic gates (including 1056 LUT6 and six 18bits MAC DSP) intended for TSMC 28nm HPM process, the area is less than 0.9mm², the static power consumption is 0.47mW and the single stage control logic runs at 740MHz while the LUT utilization is greater than 90%,” said Menta.
The pre-defined eFPGAs have from 7k-60k equivalent ASIC gates, plus DSP blocks. The IP cores are delivered as hard macros and as custom IP cores with embedded logic blocks (eLB), embedded custom blocks (eCB), and embedded memory blocks (eMB).
Menta provides Origami Designer to custom IP based on designers’ RTL.
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