This training session describes the variety of market-specific memory modules in development in the industry and coordinated through JEDEC. Some are refreshes of previous generations, such as SO-DIMMs for notebook computers and RDIMMs for cloud servers. Others are radically new architectures such as NVDIMM-P for meeting the needs of a growing heterogeneous memory hierarchy.

New on many DDR5 module configurations is on-module power management, with a new standard PMIC for high-density memories. Also introduced in the DDR5 generation is a new system management bus to replace the I2C bus used in all previous generations of SDRAM products. JEDEC and the MIPI Alliance are currently collaborating on the development of a low voltage, high-performance implementation of MIPI I3C with a hub architecture, in-band interrupts, and control of the new PMICs.

By: DocMemory
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