NAND vendors and partners jockeyed for position at the 14th annual Flash Memory Summit here. Samsung and SK Hynix said they will ship 3D chips with more than 100 layers this year, while Toshiba debuted a low latency NAND it hopes can eat into the market for DRAM.

The announcements were among the few highlights timed for this year’s event that attracted an overflow crowd but not keynoters from Samsung or Micron. Both SK Hynix and Western Digital made a pitch for software as the next lever for scaling storage, and the show floor was liberally sprinkled with PCIe Gen 4 solid-state drives (SSDs) and a variety of storage accelerators.

The doors opened as NAND prices approach the bottom of a steep downturn in the memory market. A surge in memory demand and prices over the last two years, in part due to high spending at hyperscalers, triggered large capex investments from chip makers that led to the current oversupply.

“Samsung and others are still saying recovery is around the corner, but they don’t have a good idea when it will end,” said Jim Handy of Objective Analysis.

Meanwhile vendors are shipping 96-layer 3D NAND chips and moving to 128-layer products. “Everyone thinks they can do 500-layer chips,” said Handy.

Analyst Gregory Wong of Forward Insights is more bullish on the memory market. He sees signs NAND prices at distributors are rising already. “It’s turning the corner, so Q3 could be the bottom,” Wong said.

From its Korea headquarters, Samsung announced it was in production with a 250-GByte SSD that used a new 256-Gbit NAND with three-bits per cell and more than 100 layers. It uses a dual-stack design and supports writes and reads at less than 450- and 45- microseconds, respectively, 10% faster than the previous generation while dissipating 15% less power.

The chip uses 670 million through-silicon vias, down from more than 930 million with the previous generation, enabling smaller chips made using fewer process steps. The memory giant suggested that in about a year it expects to ship 512-Gbit NAND chips with more than 300 layers using a three-stack design. It promised to have some 512-Gbit chips in SSDs before the end of the year.

Keeping the pace, SK Hynix said it will ship before the end of the year Tbit 3D NAND chips in volume. The chips use 128 layers and pack peripheral circuits under the flash cells. Eight die will enable an 11.5x13mm TByte module just a millimeter thick.

For its part, Toshiba’s single-bit per cell XL-Flash will support read latencies below five microseconds. Up to eight of the 128-Gbit die will fit in a single package with chips sampling in September and available in volume next year.

XL-Flash uses 16 planes and will be lower in cost than DRAMs and Intel’s Optane memories though not quite as fast as either. They come to market as Toshiba engineers a corporate makeover, as of October 2019 rebranding itself Kioxia Corp. “My personal vote was for Sushi Memory,” quipped keynoter Shigeo “Jeff” Oshima.

Like Intel’s Optane and Samsung’s Z-NAND, Toshiba’s XL-Flash aims to fill a gap between DRAM and NAND. The chips initially will be sold in solid-state drives, but Toshiba hopes they could eventually ride on a DRAM bus.

Beijing-based Memblaze, one of 14 XL-Flash partners, will be among the first to ship SSDs with the chips. It’s PBlaze5 X26 SSDs will sport mixed read-write latency below 20 microseconds and divide namespace across media to boost MySQL performance, the company said.

Analysts say the low-latency memories will serve a relatively small niche. Both XL-Flash and Samsung’s Z-NAND divide storage up into smaller array blocks with more sense amps to support more parallelism and thus faster response, said Handy.

XL-Flash has a larger die than NAND and is thus more expensive. It is faster than NAND but not as fast as Intel’s Optane, Handy said.

To date, Intel has sold less than ten million Optane SSDs, mainly to hyperscalers. In the short term, Intel could ship $3.5 billion worth of Optane products in 2023, Handy said. He is co-author of a report that predicts the market for all emerging memories could reach $20 billion by 2029. Optane is expected to be $16 billion of the total with the rest made up of some mix of MRAM and resistive RAM.

MRAM is posed to replace NOR flash at 28nm nodes and finer. The report does not include forecasts for NAND variants XL-Flash or Z-NAND.

Separately Toshiba announced XFM Express, a 14x18mm NAND package, essentially a pluggable BGA between an M.2 and a BGA package in size. Over time it will support two to four lanes of PCIe Gen3/4 for use in notebooks, game consoles and cars.

The new form factor is one of many NAND chips ride. Server storage cards are especially fragmented, said an SSD executive at Toshiba.

Both Toshiba ad SK Hynix announced their first SSDs supporting PCIe Gen 4 using up to four lanes. Toshiba estimates performance-hungry servers will start adopting the Gen 4 drives next year, followed by notebooks in 2021 and storage systems that require more rigorous verification in 2023.

Startup Pliops debuted a version of its storage accelerator running on a Xilinx FPGA card it said will ship before the end of the year. It was one of the more prominent of many accelerators at the event where “computational storage” has become a buzzword.

The Pliops accelerator promises to offload half of a CPU’s storage cycles while speeding write operations as much as seven-fold for MySQL transactions. It aims to supplant software such as RocksDB heavily used by hyperscalers such as Facebook.

Pliops raised $45 million to date from backers including Intel, Mellanox, Western Digital and Xilinx. Two of the founders were engineering managers in Samsung’s Israel-based design team for SSD controllers. The funding and history suggest an ASIC is not far away.

Executives from both Western Digital and SK Hynix said software will be the next big lever for accelerating NAND performance, using so-called Zoned Name Spaces. ZNS can reduce by 8x the DRAM needed for SSDs and cut storage overprovisioning ten-fold while enabling virtualization, said Christopher Bergey, general manager for data center and device markets at WD.

Both WD and SK demoed prototype ZNS products at the event. For SK the move is part of its efforts to expand into SSDs, SSD controllers and software, profitable product areas its rivals embraced earlier. ZNS can reduce data fragmentation, extending SSD lifetime up to 67%, and improving QoS up to 25% in mixed workloads, said an SK executive.

China NAND flash wannabe Yangtze Memory Technology turned down a keynote slot at the event this year, given the tensions around the U.S./China trade war. Last year, it made a big showing talking about plans that so far have not come to fruition.

Yangtze is said to be sampling its 64-layer part from a 20,000 wafer/month line, two generations behind market leaders. Likewise, China experts on a panel here said the country’s leading DRAM wannabe, Changxin Memory Technologies, is validating an 8-Gbit DDR4 part for release early next year.

“The determination is there, and new NAND products could debut very quickly,” said Michael Wang, a strategy advisor for Gigadevice, one of China’s leading NOR flash vendors.

One panelist invited the crowd to an upcoming NAND event in Hangzhou. “If you want to talk to the Yangtze guys, I strongly recommend you go there in two weeks,” said Jerome Jianjun Luo, chief executive of Sage Microelectronics who directs a microelectronics research institute at a university there.

By: DocMemory
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