SK Hynix has passed one of the hurdles to the launch of a next-generation memory.

U.S. semiconductor company Synopsys recently announced that it will provide a memory system on chip (SoC) interface solution based on its packaging technology to SK Hynix for manufacturing of the high bandwidth memory (HBM2E).

The SoC meets JEDEC's HBM2E SDRAM standard based on the 7-nm process of TSMC, and has a data rate of 409 GB/sec. It can handle 110 full HD movies (3.7 GB per film) in just one second.

SK Hynix was the first company that proposed HBM chips to JEDEC. The chip can simultaneously send power to data through thousands of holes. It can reduce the chip size by more than 30 percent and power consumption by more than 50 percent compared to the current packaging method.

HBM chips can be mounted as SoCs that are mounted close to logic chips such as GPUs several tens of micrometers apart. Therefore, they can further reduce data travel distances compared to SoCs mounted on motherboards in parallel.

However, their unit price is two to three times higher than current DRAM packaging and their sizes are larger than those of LPDDR4 chips. Therefore, their market is not large because they are used only at places requiring ultra-high performance such as large data centers such as IDCs or supercomputers.

However, they have a bright future in the market as demand for high-performance servers is on the rise with the advent of 5G mobile communication, artificial intelligence (AI), autonomous driving, and the internet of things (IoT).

In 2013, SK Hynix introduced HBM chips for the first time. Samsung Electronics also jumped in the development of HBM chips immediately, sparking off competition with SK Hynix. In the case of next-generation HBM2E chips, Samsung Electronics began their mass production for the first time in early this year. SK Hynix announced their development in August 2019, but has not yet started their launch.

By: DocMemory
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