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UMC and Faraday Technology jointly announced 28nm, 28Gbps SerDes PHY


Wednesday, March 25, 2020

United Microelectronics (UMC) and Faraday Technology have jointly announced that Faraday's 28Gbps programmable SerDes PHY is now available on UMC's 28HPC process technology.

They said the 28nm 28G SerDes can shorten chip design cycle times to more readily enable the infrastructure for 100G Ethernet, PCIe 4.0, 5G, and most xPON applications.

The CEI-25G-LR compliant SerDes solution comes with a programmable architecture that supports data rates of up to 25Gbps across long-reach channels. Additionally, it supports multiple protocol standards, including 25G/100G Ethernet, PCIe Gen1-4, and JESD204B/C. The IP is also the only 28G SerDes solution to support xPON applications in the industry, according to the companies.

"28G SerDes PHY is the essential building block for modern industrial and networking systems," said Andrew Chao, associate VP of R&D at Faraday. "By leveraging UMC's 28HPC technology, customers can receive superior system performance and cost-effective benefits, as well as comprehensive technical supports from both UMC and Faraday. We look forward to facilitating more development of wired and wireless communication systems for customers in the near future."

"The success of Faraday's 28G SerDes PHY development enables customers designing into our competitive 28nm process to expand their opportunities in high-growth data communication applications," TH Lin, UMC director of IP development and design support. "With UMC's proven 28HPC process, substantial 28nm manufacturing capacity and rich design support resources, we have created a streamlined and robust path to volume production for chip designers adopting Faraday's SerDes IP."

By: DocMemory
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