Cadence Design Systems, Inc. is a leading provider of EDA technologies and solutions for semiconductor and systems companies, offering the broadest, most integrated end-to-end solution to help today’s electronic designers do their best work when creating tomorrow’s products for silicon design creation, simulation, implementation and signoff of analog and digital circuits; off-the-shelf design IP; and IC packaging, including machine learning (ML)-enhanced EDA tools and ML-enabled EDA flows.

Over the past 30 years, Cadence has grown from being an EDA provider into an Intelligent System Design provider delivering hardware, software, and IP for electronic design. And its transformation continues.

“Three years ago, we started on a mission to expand our design and analysis capability beyond chip-package-PCB and into system design and analysis. Our goal is to transform electronic design automation to system design automation,” says Ben Gu, vice president of R&D for multi-physics system analysis at Cadence. “A chip is a complex system, but only in one domain. We want to expand to a much bigger area, from chip, PCB and package, to cars and aerospace.”

Breaking Big Designs

The never-ending trend towards smaller, faster, low-power, and cheaper electronics products, continues to be among the biggest challenges that designers face.

“The common request we’ve received from customers in the past few years is that as PCB and package designs become more complex, the minimum geometry is getting smaller, and you are getting more layers of the package, which naturally puts a lot of stress on the substrate,” says Gu.

To address this issue, Cadence released Sigrity X earlier this year, which features powerful new simulation engines for system-level analysis and includes the massively distributed architecture of the flagship Cadence Clarity 3D Solver. The new Sigrity X tool suite addresses the size and scalability challenges of system-level simulations faced by today’s leading-edge technologists in 5G communications, automotive, hyperscale computing and aerospace industries.

“We talked to a lot of customers when developing this new product. The most frequently raised issue our customers raised is that the designs are getting too big, require too much memory to solve the problem, and simulation is time-consuming because of the size and complexity of the design. It can take days or even weeks,” says Gu. “These are becoming the most pressing challenges to our customers. So, we spent the most time addressing these problems. We used an innovative matrix solver, which we call the massively parallelized matrix solver, borrowed from Clarity, in the new Sigrity X.”

Cadence’s massively parallel matrix solver technology is the most innovative element of Sigrity X. It partitions the big design into small pieces so that instead of using a big computer to solve a big design, it can use hundreds of small computer nodes to solve the entire design.

“Of course, those nodes talk to each other during simulation so we can ensure that accuracy is still being maintained,” says Gu. “By doing that, we address the capacity and performance.”Cadence Design Systems, Inc. is a leading provider of EDA technologies and solutions for semiconductor and systems companies, offering the broadest, most integrated end-to-end solution to help today’s electronic designers do their best work when creating tomorrow’s products for silicon design creation, simulation, implementation and signoff of analog and digital circuits; off-the-shelf design IP; and IC packaging, including machine learning (ML)-enhanced EDA tools and ML-enabled EDA flows.

Over the past 30 years, Cadence has grown from being an EDA provider into an Intelligent System Design provider delivering hardware, software, and IP for electronic design. And its transformation continues.

“Three years ago, we started on a mission to expand our design and analysis capability beyond chip-package-PCB and into system design and analysis. Our goal is to transform electronic design automation to system design automation,” says Ben Gu, vice president of R&D for multi-physics system analysis at Cadence. “A chip is a complex system, but only in one domain. We want to expand to a much bigger area, from chip, PCB and package, to cars and aerospace.”

Breaking Big Designs

The never-ending trend towards smaller, faster, low-power, and cheaper electronics products, continues to be among the biggest challenges that designers face.

“The common request we’ve received from customers in the past few years is that as PCB and package designs become more complex, the minimum geometry is getting smaller, and you are getting more layers of the package, which naturally puts a lot of stress on the substrate,” says Gu.

To address this issue, Cadence released Sigrity X earlier this year, which features powerful new simulation engines for system-level analysis and includes the massively distributed architecture of the flagship Cadence Clarity 3D Solver. The new Sigrity X tool suite addresses the size and scalability challenges of system-level simulations faced by today’s leading-edge technologists in 5G communications, automotive, hyperscale computing and aerospace industries.

“We talked to a lot of customers when developing this new product. The most frequently raised issue our customers raised is that the designs are getting too big, require too much memory to solve the problem, and simulation is time-consuming because of the size and complexity of the design. It can take days or even weeks,” says Gu. “These are becoming the most pressing challenges to our customers. So, we spent the most time addressing these problems. We used an innovative matrix solver, which we call the massively parallelized matrix solver, borrowed from Clarity, in the new Sigrity X.”

Cadence’s massively parallel matrix solver technology is the most innovative element of Sigrity X. It partitions the big design into small pieces so that instead of using a big computer to solve a big design, it can use hundreds of small computer nodes to solve the entire design.

“Of course, those nodes talk to each other during simulation so we can ensure that accuracy is still being maintained,” says Gu. “By doing that, we address the capacity and performance.”

Usually, simulating a big design needs a 1TB machine, which can take days to solve. By using small computer nodes—sure, you are using more computers—but considering computing resources, it’s not that much greater, and the runtimes become much better, according to Gu. “You save lots of time, and the design cycle is significantly reduced,” he adds.

Recognizing Innovation Excellence

Cadence Sigrity X has been honored with the Best EDA Product of the Year award in the inaugural EE Awards Asia program.

Delivering up to a 10X performance gain for simulation speed and design capacity, Sigrity X provides a new user experience that streamlines setup time for detailed system-level SI/PI analysis by transitioning seamlessly across different analysis workflows.

“This is a significant testament from the industry to our innovation,” says Gu. “We are really proud, and we know that a lot of products have been nominated for this award. But becoming a final winner is definitely a big honor, which also means all our customers really love the product since they graciously gave us their votes. We appreciate it, and we are very proud.”

Technology Roadmap

“With Sigrity X, we have a strong and broad product portfolio. SI/PI, thermal FEA & CFD—these are areas where we plan to continue making enhancements. Now that Sigrity X technology is on the market, our number one priority is to support our customers to transition from Sigrity to Sigrity X. We strongly believe Sigrity X will be of high value to them and will help them improve their productivity,” says Gu.

He notes that Cadence plans to continue innovating with Sigrity X. “We are happy to work with our customers to understand their most pressing needs so we can continue to advance the product,” says Gu.

By: DocMemory
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