In its quest to develop advanced packaging, Intel has set its sights on a new material for chip substrates: glass.

Glass’s stiffness and lower coefficient ratio of thermal expansion make it superior to organic substrates because it doesn’t expand and warp as much. Those properties make glass superior in dimensional scaling, such as lowering pitch, Pooya Tadayon, fellow and director of assembly and test pathfinding at Intel, said in a company roundtable discussion on packaging last month.

“Using a glass substrate allows us to introduce some interesting features and geometries that allow for improved power delivery,” Tadayon said. “And it’s also an enabler for extending high-speed diodes beyond 224G and into the 448G space.”

Employing glass substrates will be a gradual process as tools and manufacturing processes are developed and needs emerge. Glass will coexist with organic substrates, not replace them, Tadayon said.

Intel’s Tom Rucker.

In its advanced packaging efforts, the company has transitioned from system-on-chip to system-in-package, said Tom Rucker, vice president of technology development and director of assembly and test technology development integration at Intel.

“This transition continues aggressively now, as we transition many product lines to our EMIB [embedded multi-die interconnect bridge] technology,” Rucker said. “And now, we’re also moving to 3D interconnects, which support stacking of die and where we can increase the die count, drive to smaller geometries and get higher performance—all within one packaged unit.”

With large package sizes, however, comes a mechanical challenge that prompted Intel to expand its capabilities. As Tadayon noted, substrates tend to warp. This makes it difficult to assemble them onto a motherboard, added Mark Gardner, senior director of foundry advanced packaging at Intel.

“So we have found that it helps our customers if we have board assembly know-how, and we can work with board-assembly houses to make that process more seamless for our customers,” Gardner said.

An Intel employee works on packaging R&D at the company’s advanced packaging lab in Arizona.

In and out of the hopper

Among Intel’s newly available products and those still in development are:

Intel’s Pooya Tadayon.

The glass bridge is used instead of directly attaching and gluing fibers to silicon, which prevents reworking it. The “unique solution” allows plugging and deplugging. The coupling is targeted for production by the end of 2024, Tadayon said.

Foveros is also targeted for further development, and Intel will continue pitch scaling to 9 m.

“And then looking in the next generation of that technology, we intend to go below 5-m pitch for future offerings,” Tadayon said. “We will also be offering some novel architectures and 3D stacking features to allow architects to connect these chips in different ways and take advantage of the flexibility that this platform offers.”

What’s driving these innovations?

“Packaging plays a critical role in enabling compute for all segments of the ecosystem, from high-performance supercomputers to data in data centers to computing at the edge, and all the intermediate steps that store, transmit and act upon data,” Rucker said. “The primary metrics that drive technical solutions [are] performance, scaling [and] cost.”

A la carte vs. prix fixe

The chipmaker is also tweaking its foundry services and has discarded its all-or-nothing approach.

Intel’s Mark Gardner.

Gardner described the company’s revamped open-system foundry model, which offers more flexible, à la carte services related to a product’s entire manufacturing life cycle, from product specification to testing.

“It used to be you had to use all of our manufacturing or none of it,” he said. “This go around, it’s very flexible.”

In addition, testing can now be performed earlier in the manufacturing cycle, which promises to be a money saver.

“The reason that’s so important, if you think about Ponte Vecchio [i.e., Data Center GPU Max], it has almost 50 pieces of chiplets or tiles,” Gardner said. “If only one of those is found to be bad at the end of the final test, you throw all the other good die and a really expensive package away. We’ve seen the ability to be able to have more of the final test content upfront.”

By: DocMemory
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