It has been quite a challenging year for the global semiconductor industry, amid continuing weak demand in the computing, communications, and consumer segments. According to the Semiconductor Industry Association (SIA), global semiconductors sales reached $134.7 billion in the third quarter, up by 6.3% from the previous quarter but down by 4.5% compared to the third quarter of 2022.

Meanwhile, SEMI reports that global silicon wafer shipments in the third quarter fell by 19.5% year-on-year to 3,010 million square inches. Quarter-on-quarter, the figure is down 9.6%.

“The global semiconductor market has faced adverse impacts such as geopolitical risks, rising interest rates, chip and talent shortages in the past year,” explains Michael Ho, president of eMemory Technology Inc., during an interview with EE Times Asia. “Various market uncertainties have indirectly caused weak terminal demand, forcing the industry to face the challenges of destocking and readjusting the balance of supply and demand.”

He notes, however, that there are still new demand drivers emerging in the market such as automotive chips, high-performance computing (HPC), and artificial intelligence (AI). “For manufacturers that can follow the wave of technology, the market has survived a relatively pessimistic and unstable period and is about to usher in a new wave of growth,” he says.

eMemory is one of the leading providers of non-volatile memory IP and PUF-based security IP, and as such, its revenue mainly consists of licensing fees and royalties. Based on their observations in the market, Ho says eMemory is moving into the next multi-year growth cycle due to strong demand for licensing and accumulated new tape-outs entering the mass production stage have been driving their royalties.

“For our two major OTP products—NeoBit and NeoFuse–the inventory adjustment phase of NeoBit has ended, and we have seen many new wafer orders. As for NeoFuse, the growth of royalty will also be accelerated as more than 70 tape-outs in 16nm, 12nm, and 7nm move into production,” explains Ho. “Our MTP-related technologies, which we have been cultivating for more than 20 years, are now making their way into DDR5 and other mainstream applications. We expect licensing and royalties to see significant growth in the coming years.”

The company’s PUF-based security-related technologies have also seen increased demands in various applications like mobile, automotive, edge computing and more, adds Ho. In particular, its PUF-based Root of Trust is adopted in Arm’s Confidential Computing.

Award-winning technology

One new-launched product from eMemory is NeoFlash, a scalable embedded non-volatile memory (NVM) solution that excels in size, cost-effectiveness, and seamless implementation across CMOS processes from 250nm to 22nm HKMG (High-k Metal Gate). With its simple process, robust design, and low cost, NeoFlash is an excellent embedded NVM solution for most system-on-chip applications.

“In the embedded flash war zone, everyone is looking for a reliable solution with a smaller cell size and fewer mask adders, which is cheap and easy to make. Since 2002, eMemory has been a pioneer in embedded SONOS technology. At that time, there was no perfect solution on the market, so NeoFlash’s goal was to provide customers with a product that struck a sweet balance between size and cost without having fatal flaws,” says Ho. “After two decades of research, the performance and reliability of SONOS Flash have significantly improved, making it optimal for manufacturers and users to access.”

One of the key advantages of NeoFlash is its SONOS (Si-Oxide-Nitride-Oxide-Si)-based technology. According to Ho, SONOS technology enables all CMOS processes to have embedded flash solutions with less than three additional photo masks. Because of this, NeoFlash utilizes existing manufacturing equipment and flows without additional capital investment and minimizes the impact on production capacity.

“NeoFlash ensures seamless integration without altering CMOS logic devices’ characterization. Therefore, other circuits on the SoC will not be affected, thereby saving designers’ efforts,” says Ho. “Furthermore, since it is based on CMOS processes, NeoFlash has no erratic bits, thereby eliminating the burden of error correction. It is a powerful and cost-effective choice for SoC system applications, and as such, is attractive to design engineers and wafer foundries.”

On top of this, NeoFlash also features a P-MOS design, which significantly reduces the programming voltage requirements. It consists of two P-channel transistors in series: a thick-gate transistor for access selection and a charge-trapping SONOS transistor for data storage. NeoFlash utilizes channel hot electron injection to achieve fast but energy-efficient programming and a mature channel Fowler-Nordheim (F-N) tunneling mechanism to attain reliable and power-saving erasing. The P-MOS design makes NeoFlash particularly suitable for technology nodes with lower power supply voltage and low-power applications while saving customers the cost of high-voltage components.

“Combining the SONOS and P-MOS technologies, NeoFlash is a highly promising embedded NVM solution, especially for intelligent PMIC applications,” says Ho. “Because it requires fewer masks, it is the best flash solution for USB-powered chips, battery management ICs, and other PMICs that utilize BCD processes. Another high-potential segment is automotive ICs, thanks to the additional advantage of its being erratic-bits-free,” says Ho.

And it is these features that eMemory’s NeoFlash technology has landed two awards—Best IP/Processor of the Year and Innovation Award—at this year’s EE Awards Asia. Now in its third year, the EE Awards Asia, organized by AspenCore, celebrates the innovation, creativity, and contributions of Asia’s engineering community that have made a difference in the way we work, live, and communicate over the past year.

“This is an encouragement for our technology and our persistence over the years,” comments Ho. “With such recognition, we look forward to more adoptions of the NeoFlash technology. While innovating new technology is never easy, we understand it is also a hurdle for a new technology to be adopted. With our production record and end-to-end service, and now with these Awards recognition, we will ensure to get customers through any hurdles encountered along the way.”

Innovations in the pipeline

eMemory is not resting on its laurels as the company has quite a few things going on.

“Firstly, we are migrating into advanced process nodes with our partners toward 3nm and beyond,” says Ho. “It is both exciting and challenging.”

In the meantime, the company is also continuing to invest in developing and enabling the specialty platforms in mature nodes, such as HV, HK, and BCD, to serve the increasing demand from diversified applications.

“We are also working on the emerging memory technology,” adds Ho. “On top of NeoFlash, we are also working on RRAM/MRAM with our partners. On the security side, together with PUFsecurity, we are broadening the product availability to foundries worldwide so that customers can protect their product anywhere they choose to manufacture.”

Outlook

Despite the downturn in the semiconductor industry this year, eMemory remains optimistic for the coming years.

“There are a few opportunities that we observed,” explains Ho. “This year, 5nm technology will be adopted in self-driving, data center, and AI-related applications. Meanwhile, 3nm technology is undergoing verification at major foundries. In addition to our collaboration with CPU partners, we already have ADAS and processor customers, as well as cloud service providers requesting our IP for 3nm. We are confident about the verification process and anticipate customer design-ins next year.”

He also mentions an opportunity in the increasing SRAM repair demand. “There’s one thing highly related to advanced nodes’ development—HPC, which is an irreversible trend. HPC propels applications such as smart sensing, advanced driver assistance system (ADAS), voice recognition, and large language models (LLM), and usually requires more high-density SRAM memory that has a larger silicon footprint. These designs are more likely to have memory defects due to smaller feature sizes, and lead to larger repair density. Therefore, SRAM repair in advanced nodes is a must,” he explains. “SRAM repair is basically replacing bad memory bits with redundant memory bits. So, the locations of bad memory cells need to be stored correctly. Considering the area cost effect, yield, reliability, and flexibility, then NeoFuse OTP is a better solution for storage compared to eFuse.”

Another opportunity is the increasing security demand. This is because of the increasing number of edge networking devices and the development of high-end technologies such as AI.

“The demand for chip security and protection of confidential information is rising, and more and more security standards and certifications are gaining attention, such as PSA Certified and Matter,” says Ho. “In addition, we are also observing the development of Caliptra, an open-source standard that aims to integrate security mechanisms into chips and plays a crucial role in the Open Compute Project (OCP) reference design. Its primary goal is to establish an open-source standard for the Hardware Root of Trust (HRoT), which is essential for hardware-based security functions embedded in CPUs, GPUs, SoCs, ASICs, network chips, SSDs, and more. As far as we know, this is the first time TRNG, OTP, and PUF are collectively addressed within a single standard, which happens to be our strengths and expertise.”

Last but not least, Ho sees increasing demand for chiplet related applications. “Customers use our OTP for multi-chip repair because the traditional eFuse is unsuitable for post-packaging modifications,” he says. “For example, in recent years, ISPs that need to be packaged with DRAM and CIS are driving customers to use our OTP for ISPs. Furthermore, DRAM manufacturers have also licensed our technology for DRAM repair, and after 3D or 2.5D chip packaging with logic chips. We expect more adoptions of our IPs for similar applications in the future.”

By: DocMemory
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