Executives at chip startups Tenstorrent and Alphawave foresee a day when their firms’ sales of chiplets and IP erodes the business of incumbent chip vendors like Qualcomm.

An SoC customer must buy graphics, image signal processing, media, application processing, Arm cores, a modem and security all in one chip, Tenstorrent COO Keith Witek told EE Times, noting that chiplets allow more choices.

“With chiplets, you can say, ‘I don’t want to get $130 of my solution from Qualcomm.’ In fact, somebody might say, ‘I only think their modem is good. The rest of the stuff I can get from a different chip’.” Witek emphasized that he gave Qualcomm as an example only.

Designers Alphawave and Tenstorrent expect chiplets to sell like commodities in a marketplace. That remains only an expectation.

“In the past, the chiplet systems were implemented mostly by a few large companies that had all the expertise and access in-house,” Alphawave CTO Tony Chan Carusone told EE Times. “Now you’re starting to see broader availability of the technology.”

Tenstorrent foresees the “democratization” of chiplets. The big chip designers like Apple and AMD have their own chiplets, but they’re not sharing them with other chip designers, Witek added.

In fact, Witek said he and Tenstorrent CEO Jim Keller “and many others want to bring chiplets out into the light of day—democratized chiplets—and make it that common interface, common packaging technology.” New chiplet vendors could be “Synopsys, Cadence, Alphawave, Samsung, Micron, even Intel or Qualcomm or MediaTek,” he added.

In expectation of a new and growing market, semiconductor foundries are scaling up production for startup chiplet designers like Alphawave, Carusone noted. He expects some new competitors will provide innovative advanced packaging services to stitch chiplets together.

“When you get into heterogeneous integration, the combination of chiplets from different technologies, there are just so many permutations that having new entrants come in there and innovate is inevitably going to enable some new things that are going to be useful in specific markets or specific applications,” Carusone noted. Photonic packaging is one possibility he mentions.

Alphawave specializes in chiplets for connectivity.

“It just makes sense for customers to rely on us to solve their connectivity needs and let them focus on what their particular technology is,” Carusone said. “Whether we’re taking care of their connectivity needs by delivering them IP or helping them with a packaging solution or delivering them a chiplet, they’re still adding value.”

Universal chiplet interconnect express (UCIe), the open specification for die-to-die interconnect created in 2022, is the key standard that will allow different vendors to connect their chiplets while improving chip fab yields with the use of smaller dies.

Tenstorrent plans to offer its Quasar compute chiplet and its Aegis RISC-V chiplet this year, Witek said. The company will leave room for other vendors to add their chiplets for DRAM, I/O interfaces, display, and multi-PHY, he added.

“You can basically pick and place these different Legos to serve different markets,” Witek said. “Instead of waiting for monolithic silicon to be designed in three to four years, you can put these Legos together in three to six months and go to market with a new product.”

The $30,000-and-beyond price of a wafer from an advanced fab like TSMC is becoming prohibitive for production of chips used in mobile phones, IoT consumer electronics and cars, he added.

“From a cost perspective, something has to change,” Witek said. “You break your design into pieces and only run the small portion of it at the high-expense nodes where you really need the performance, and all the rest of it can go to fully depreciated fabs and nodes.”

Increasing wafer costs are driving the trend to chiplets, SemiAnalysis chief analyst Dylan Patel told EE Times. That’s making it easier for small companies to find niches in the chip space, he added.

“If you want just massive monolithic chips, only the biggest companies could ever afford this because the design costs are so high,” Patel said.

Today, buying a chiplet is less risky, Carusone said. Once packaging capacity and verification issues are solved and the technology matures, the risk of integrating an IP block into an overall design will diminish, he added.

“What’s required is for the packaging ecosystem to mature so that putting together pre-built chiplets into a new system can be done as quickly and easily as putting together a printed circuit board with chips that are off the shelf,” Carusone said.

That advanced packaging ecosystem is materializing in large chip foundries like Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung, which are cautiously building capacity yet are unable to satisfy demand from big customers like Nvidia, according to Witek.

“[TSMC] is doing a little bit of stuff at wafer scale with InFO (integrated fan-out wafer level packaging) and CoWoS (chip-on-wafer-on-substrate),” he said. “They’re really careful not to compete against [chip packagers like] Advanced Semiconductor Engineering (ASE) and Amkor. You really have to have another relationship with the packaging houses when the wafers come out of the TSMC fab, and that gets complicated. You need a much more capable team inside Tenstorrent that we don’t have yet, and a lot of startups don’t have. That part of the supply chain hasn’t fully crystallized yet, and that will crystallize in the next two to three years.”

Samsung’s also expanding into advanced packaging in preparation for an AI boom, according to Reuters. Samsung Advanced Interconnection Technology (SAINT) uses 3D packaging to stack chips with a higher density than TSMC’s 2.5D packaging, the article noted.

Witek sees foundries like Samsung and IP providers like ARM as winners in the chiplet ecosystem.

“IP companies are looking at this chiplet phenomenon” Witek said. “They see this as an opportunity to take their IP and make it into chiplets, and instead of selling ones and zeros in the form of RTL (register transfer level) and taking a small fraction of the design, they’ll sell chiplets at eight to ten bucks apiece and drive the top-line revenue. That’s ten times [revenue] or more where they are today.”

Foundries like TSMC and Samsung are likely to expand in advanced packaging at the expense of chip packagers like ASE and Amkor, Weitek adds.

“I think it’s the TSMCs and the Samsungs and others that win because we’re going to need that kind of high-end capex [capital expenditure] equipment to make this technology work. They can do it without investing more capex. A company like ASE or Amkor has to build Class 1 fabs, and they don’t have them now.”

By: DocMemory
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