The High Bandwidth Memory (HBM) market has the potential to grow to $14 billion this year, says Yole Developpement, with a CAGR23-29 of ~38%, reaching about $37.7 billion in 2029.

It is led by the continuous expansion of data-intensive AI and HPC applications.

As a result, the HBM sector will largely outgrow the overall DRAM market and remain undersupplied throughout 2024.

4F2 cell designs, hybrid bonding, and monolithic 3D DRAM will enable long-term DRAM scaling.

During the memory market winter, DRAM demand bits stayed low, except for AI servers and automotive electronics. Generative AI applications like ChatGPT drove interest in high-speed memory technologies like DDR5 DRAM and HBM, especially in data centres.

“Samsung, SK Hynix, and Micron diverted more wafer capacity to HBM to meet demand, slowing overall bit production and increasing undersupply for non-HBM products. HBM wafer production is set to double in 2024,” says Yole’s Simobe Bertolazzi.

Driven by AI computing demand, HBM is expected to outpace the overall DRAM market significantly.

HBM set to outpace overall DRAM growth

HBM bit shipments grew by 93% in 2023 and are projected to grow by 147% in 2024, with a 45% CAGR from 2023 to 2029, while data center DRAM bits will grow by 25%.

HBM market revenue could rise from $2.7 billion in 2022 to US$14 billion in 2024, accounting for 3% and 19% of overall DRAM revenue, respectively.

“The development of 4F2 DRAM aims to shrink the chip area by approximately 30% compared to existing 6F2 structures, without requiring smaller lithography nodes,” says Bertolazzi, “additionally, the adoption of CBA (CMOS Bonded Array) DRAM architectures, where the periphery circuit and memory array are processed on separate wafers and then stacked together using wafer-to-wafer hybrid bonding, is expected to commence with the introduction of 4F2 cells by 2027.”

Hybrid bonding will also be essential to advance HBM technology to enhance memory bandwidth and power efficiency and reduce stack thickness.

The implementation of hybrid bonding is anticipated to start with the HBM4 generation around 2026, featuring up to 16 DRAM dies per stack and doubling the interface width to 2,048 bits.

While monolithic 3D DRAM is a promising long-term scaling solution, many aspects of its development remain uncertain, and the optimal strategy has yet to be defined.

DRAM companies are exploring various approaches, including 1T-1C cells with horizontal capacitors and capacitor-less options like gain cells (2T0C) or 1T-DRAM based on the floating-body effect.

The transition from 2D to 3D DRAM is expected to bring significant transformation to the DRAM industry, akin to the evolution seen with 3D NAND technology.

Current models suggest that 3D DRAM could enter the market around 2030, reaching approximately ten million wafers per year by 2035, accounting for 38% of the projected DRAM wafer production.

AI has been incorporated into smartphone features for several years, but the implementation of adapted LLM in high-end devices could result in an early boost in the demand for DRAM and an acceleration in the phase-out of the smallest NAND storage capacity. The rise of AI-enabled smartphones could trigger additional demand for DRAM and NAND above the current forecast.

By: DocMemory
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