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Intel goes on 100% American Made


Friday, February 23, 2024

Intel’s previous struggles to develop new process node technologies resulted in the company eventually ceding its semiconductor manufacturing advantage to its rival TSMC. In the years since, Intel has worked to reverse that deficit with CEO Pat Gelsinger’s audacious turnaround plan, which hinges on delivering five new process nodes in four years. Critically, the plan also hinges on pivoting the company to a new IDM 2.0 philosophy that includes creating a third-party foundry, Intel Foundry Services (IFS), that produces chips for external companies while also allowing the company to retain the inherent advantages of being an IDM.

Intel’s revitalization requires hundreds of billions of dollars in investments that span the globe as it builds out additional chipmaking and packaging capacity to fuel IFS, an organization helmed by Stu Pann, the SVP and GM of Intel Foundry Services, who is tasked with making IFS the world’s second-largest foundry by 2030.

Tom's Hardware had a chance to speak with Pann in the lead-up to the company’s inaugural IFS Direct Connect 2024 event this week (update: see the roadmap from IFS here now and news about Microsoft's 18A chip), with our interview covering important topics such as Intel’s new tactic of making Arm chips for external customers, the impact of the CHIPs Act, potential development of custom nodes, collaboration plans with UMC and Tower, and the threat of China to the mature node market.

IFS Direct Connect 2024, which kicks off tomorrow, features not only the best and brightest of Intel, like CEO Pat Gelsinger and EVP and GM of Technology Development Dr. Ann Kelleher, but also other industry luminaries, including Microsoft CEO Satya Nadella, OpenAI CEO Sam Altman, Arm CEO Rene Haas, and U.S. Secretary of Commerce Gina Raimondo.

Intel also has a full complement of representatives from its partners and customers, like UMC President Jason Wang, MediaTek President Eric Fisher, and Broadcom’s VP of Central Engineering Yuan Xing Lee, along with representatives from the incredibly important EDA suppliers, such as Synopsys, Cadence, Siemens and Ansys, that will be instrumental in Intel’s efforts to enable a robust set of industry-standard design tools that allow its IFS customers to easily design chips around its new process nodes.

IFS Direct Connect will generate plenty of news around new developments, but today, we have an interesting question and answer session with Stu Pann to discuss several of the latest IFS developments. Pann also spoke about some of the company’s not-yet-disclosed future plans -- but we’ll have to add those additional comments after the embargo lifts tomorrow.

Paul Alcorn: I know it’s been announced that IFS is open to making Arm chips for quite some time now, but seeing the recent news hit the wire that Intel is now building an Arm chip with Faraday -- it's kind of like a splash of cold water on the face; it’s still surprising to me: You're now doing Arm Neoverse chips on Intel process nodes. Can you tell me how important that is, and about the message that it delivers to the industry?

Stu Pann: I think it's hugely important. If you look at where Arm is at today with the current Neoverse lineup, they're powering all the hyperscalers and TSMC runs those wafers. If we're going to play in that market, we have to have a strong relationship with Arm, and the Faraday announcement that we did with their server infrastructure team is proof that we want to do this kind of business.

Just the fact that [Arm CEO] Rene Haas and I are going to be on stage talking about the Arm partnership at an Intel conference with 1,100 people in attendance - that’s proof positive that we're serious about doing this business. You can't really go back on this kind of stuff. We're committed, and we're going to move forward. We recognize that Arm has won a lot of sockets, and we want to work with them closely to make sure that whatever they do with Neoverse is optimized for 18A. And expect Rene to say more on that next week [at the event].

Paul Alcorn: TSMC creates a custom N4 process node for Nvidia for its GPUs. Is IFS open to doing that level of collaborative work with a third party?

Stu Pann: Absolutely. […] You can't do it just by yourself; you have to do it with an EDA partner. So, our investment with Synopsys and our investment with Cadence absolutely allows for that kind of customization, should a customer want it, but they have to commit to it. It'll be a mutual commitment to go forward. Absolutely, we're open to that.

We’re already learning so much for our existing customers, like things about process corners, that we didn't realize. And so just the entire foundry engagement is helping Intel, I think, just to be a better company in general, because everybody does things a little differently. You take what you get, and you learn a lot from it, and then you start integrating it into your thinking around process flows and foundational IP. So we're already seeing ways we hadn't thought of to do things better as now becoming pretty clear as people press us for different things.

Paul Alcorn: Intel has recently said that 75% of the fifty IFS customer test chips are currently on 18A. Did you expect such a skew toward the leading edge? You do offer other nodes that aren't necessarily leading edge, but they aren’t mature nodes, either. It seems like the uptake is really on the leading edge of what you're offering. Did you expect more in those other nodes, or do you expect more pickup in those?

Stu Pann: No, this is what we wanted. If you look at 18A as a process technology, it is full-on EUV, and it has backside metal. It was designed from the ground up to be a foundry node with the most complete set of IP around it for processes and tools, flows, and methods. Part of the reason you see both Cadence and Synopsys on stage with us [at the event] is that everyone has a different way of doing things. To be complete, we have to have relationships with all four of the folks that are on stage with us [EDA partners].

People mix and match -- I don't want our customers to have to choose to do something differently with a different flow. I’d rather make it easy and friction-free for them to say, “Ok, I can use this place and route from Cadence, and this IP from Synopsys,” or whatever configuration they want. We want to make sure it's available, and we're able to do that fully on 18A.

Paul Alcorn: IFS has the goal of being the number two foundry by the end of the decade. That's a big goal. Just in terms of sheer scale, do you think that will hinge a lot on this build-out of more mature node capacity with UMC and the collaboration with Tower?

Stu Pann: No, but it does clearly contribute to it. There are some huge wafer BOMs [large volume orders] associated with UMC and the Tower deal. We want to have these mature nodes, and we learn a lot from being engaged with UMC and Tower - and how to do low-cost things. We learn a lot from UMC in terms of doing line extensions, because they do line extensions to all of their products today.

That's a really powerful partnership for us, but our real thrust has to be around 18A. The market price for a 12nm wafer is very different than the market price of an 18A or an N3P wafer. So, if you’re going to get to that kind of goal, you have to be able to build the most high-performance process on the planet, which can then command the best price on the planet.

Now, clearly, we have to compete with TSMC, and we're going to have to be aggressive on pricing. But it's still a better place to be, and it's got all the attributes we need to be competitive on our own. We have our own process technology, our own packaging technology, and we know how to make the tools work. And we have the ability to compete for that business by applying our systems expertise and helping our customers out, which is something that's unique to us.

We just have a much higher degree of winning significant customer orders on 18A, which is why we're focused there. [...] I’ll give you an example: You probably know the dates for Samsung's backside power with their 2nm process, and you know TSMCs dates for backside power with 2nm. You'll see our dates, and then you compare and say, okay, where’s Intel at versus where the other guys are. Then you can look at our footprint and our track record and then decide who's likely to be successful with these customers.

Paul Alcorn: Speaking of building capacity brings us to the CHIPs Act. It feels like the US government is taking its time with the subsidies; it's taken a lot longer than most people expected. How instrumental do you think that is as a booster for IFS?

Stu Pann: It's hugely important to us. We’ve worked closely with the CHIPS office. Pat was personally responsible, I think more so than any American executive, in making the CHIPS Act a reality. Since its inception, we've been in the middle of this.

And yeah, the CHIPS guys who we've worked with really closely are being very diligent stewards of the country’s spending. They've got a very thorough process, they're very well-researched, and they have a lot of questions. They want to make sure that they give us the kind of money that we're asking for and that it's going to be money well spent, and that process takes time.

This is the biggest piece of industrial policy legislation since World War Two. They’re building the plane as they're flying it right now. And we're hopeful we can conclude some level of agreement with them, but it'll conclude when it concludes. Secretary Raimondo will be the one who says, ‘Okay, I'm now ready to talk about it.’ But the fact that she is coming to the event says that she wants to talk about Intel's role for the US and its allies in terms of being a national champion for US semiconductors. That was the message she delivered on Cramer’s broadcast four or five weeks ago. We'll see what she says next week. But she is keenly interested in making sure that the most important semiconductor supplier in the United States is helped by this effort.

Paul Alcorn: This brings us to RAMP-C. Can you tell me what initiatives like that do and how important is it for the Department of Defense (DoD) and Intel to build that relationship?

Stu Pann: Yeah, during the earnings call, we announced that we had a billion-dollar reward from the US government in terms of supplying advanced semiconductors to the DoD. Where they go, and what they do, we obviously would never talk about, but they don't make a billion-dollar commitment without serious research and serious commitment. Not only on their part, but on the part of the defense industrial base.

If you look at RAMP-C, Lockheed Martin and Northrop Grumman are a part of it, and Boeing has expressed an interest. All the defense industrial base right now is looking at RAMP-C and what it means very carefully. And in fact, we actually have a government session the day after Foundry Day, just for those customers because they have a very specific set of requirements. So that's been a big deal for us, just for establishing us as a mainstream supplier of the US government in a lot of different applications.

One of the DoD senior scientists said this kind of capability gives our soldiers an asymmetric advantage on the battlefield because they're now able to use leading-edge technology versus technology that’s ten years old. So, the DoD has been a huge booster because they want this capability for our soldiers and our troops protecting the US national interests.

In terms of the other things that RAMP-C bought us, the announced partners of RAMP-C are IBM, Microsoft, and Nvidia. They're all running test chips, and they’re running test chips with funding from RAMP-C. So they’re able to operate with immature PDKs, which normally they wouldn't do.

The government funding allows them to operate with much lower-sophistication PDKs than somebody would normally run test chips with. And so that's been really instrumental in helping us learn how our customers view our process/performance, the classic PPAC (power, performance, area, and cost): those test chips tell you what the PPAC looks like. So that gives us at least a head start with those customers in terms of developing a track record, allowing them to use immature PDKs, and covering their expenses. Hopefully that leads to more design wins down the road, but we’re not ready to announce those today.

Paul Alcorn: Can you address the persistent rumors that IFS is doing packaging work with Nvidia, or for Nvidia?

Stu Pann: I can't. I am aware of the rumor. In this business, especially now, our customers are asking for confidentiality; they don't want to disclose. They will decide when and where they want to disclose and what they'll disclose. I’m not speaking with Nvidia in mind, but just generically – all the customers feel that way. When they're ready to talk, they will talk, and they will let us know when they're going to talk. I would love to be more visible, but I also have to respect what they want.

Paul Alcorn: I know you just had the Rio Rancho site come online for advanced packaging. However, IFS is already doing packaging work for its external customers. Where is that packaging taking place? Is that within your existing fab network, and is all of that based in the US?

Stu Pann: The plan right now is to do a lot of the really sophisticated packaging in New Mexico, Oregon, and some in Arizona. Depending on the product and what kind of packaging we're doing, it will oscillate around those. We could do a final assembly and test in Costa Rica, for example, with server [processors], because Costa Rica does the bulk of our assembly/test for our server parts. If somebody wanted a fully integrated, tested, packaged, everything kind of deal, they could do that, but they could also send us TSMC wafers, for example, and we can package them up and get them sent back to their OSAT (outsourced assembly and test) for final assembly/test.

We're willing to configure whatever our customers want us to and do whatever parts of the packaging process they want us to play in, provided we have some form of competitive advantage. We’re winning customers on EMIB, which is Intel proprietary. We’re winning customers based on a technology that really is a Foveros kind of thinking - not the way Meteor Lake is done, but it is hybrid bonding. So, we're working on the supply chains to go do all of that. But we're trying to be as customer-sensitive as we can be.

A lot of customers want at least a ‘Made in the Americas’ kind of setup. And if we do a wafer fab in the US for an 18A logic device, for example, we can package something in the Americas in its entirety without having to have it cross the Pacific Ocean. Now, having said that, we’ll do packaging in Malaysia and obviously open up packaging in Poland over time. So, it'll be resilient, but if you want to dictate a certain flow, if we can make it work in our network, we're sure going to try.

Paul Alcorn: One thing that really sticks out about how TSMC operates is their OIP program, where they have this big arsenal of tools that are available for their customers. Is IFS looking to develop a similar approach or program in that vein?

Stu Pann: I hired the guy that did that program a while ago. We're going to have a slide about that in my deck, which will describe our answer to OIP. The fact that we have 33 ecosystem vendors who have booths everywhere [at the event], it’s just like the duty-free shops in the airport -- you have to walk past all that to get to the main stage.

Paul Alcorn: We’re starting to see a lot of fab build-outs in China, primarily around mature nodes, and a lot of CAPEX is going into that. A lot of industry leaders have signaled an increasing alarm. I think Secretary Raimondo herself has said they're worried about China flooding the market with mature chips. I know in the sphere of big foundry players with extensive mature node capacity, like TSMC or maybe GlobalFoundries, that could potentially really hurt. What about for IFS? How do you think this impacts IFS and its competitive position?

Stu Pann: Yeah, this is mostly mature node stuff. Doing a deal with Tower, where we take advantage of fully depreciated factories and fully depreciated tools, and where they contribute some newer tools to that. We duplicate their process flow, and we give Tower a US-based source of capacity that they could not do on their own for cost and timing reasons. Same with UMC; We have an available building in Arizona, a lot of depreciated tools from our 14nm and 10nm process technology, and we have the people there. And the building is not EUV-capable. So, we have a set of assets, and we are able to sweat those assets more effectively by doing collaboration agreements with them – these aren’t really formal partnerships. Collaborating with them in the supply chain gives us a great cost base, and we can do line extensions in US-based capacity.

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