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JEDEC publishes GDDR7 Graphics Memory Standard


Thursday, March 21, 2024

JEDEC has published a GDDR7 Graphics Memory Standard, JESD239, to improve memory performance in applications such as AI, graphics, gaming.

JESD239 standard to improve GDDR7 memory performance in AI, Gaming

Specifically, the standards body has announced the publication of JESD239 Graphics Double Data Rate (GDDR7) SGRAM.

Described as a groundbreaking new memory standard, JESD239 GDDR7 offers double the bandwidth over GDDR6, reaching up to 192 GB/s per device. JEDEC highlights the escalating demand for more memory bandwidth in such areas graphics, gaming, compute, networking and AI.

Also, JESD239 GDDR7 is the first JEDEC standard DRAM to use the Pulse Amplitude Modulation (PAM) interface for high frequency operations: its PAM3 interface is designed to improve the signal to noise ratio (SNR) for high frequency operation while also improving energy efficiency.

By using 3 levels (+1, 0, -1) to transmit 3 bits over 2-cycles versus the traditional NRZ (non-return-to-zero) interface transmitting 2 bits over 2-cycles, PAM3 offers higher data transmission rate per cycle, which resulta in improved performance, it says.

“JESD239 GDDR7 marks a substantial advancement in high-speed memory design,” said Mian Quddus, JEDEC Board of Directors Chairman. “With the shift to PAM3 signaling, the memory industry has a new path to extend the performance of GDDR devices and drive the ongoing evolution of graphics and various high-performance applications.”

“GDDR7 is the first GDDR that not only focuses on bandwidth but addresses the market needs for RAS (Reliability, Availability, Serviceability) by incorporating the latest data integrity features that allow GDDR devices to better service existing markets such as Cloud gaming and compute and extend into new applications such as AI,” added Michael Litt, Chair of the JEDEC GDDR Subcommittee.

Additional advanced features of JESD239 GDDR7 highlighted by the standards body include:

* Core independent LFSR (linear-feedback shift register) training patterns with eye masking and error counters to improve training accuracy while reduce training time.

* The standard doubles the number of independent channels doubles from 2 in GDDR6 to 4 in GDDR7.

* There is support for 16 Gbit to 32 Gbit densities including support for 2-Channel mode to double system capacity.

* It is said to address the market need for RAS by incorporating the latest data integrity features including on die ECC (ODECC) with real time reporting, data poison, Error check and Scrub, and command address parity with command blocking (CAPARBLK).

AMD, Micron, NVIDIA, Samsung and SK Hynix are among the companies that participated in the standard work, as members of JEDEC.

By: DocMemory
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