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Microchip’s Neuronix acquisition meshes AI content into FPGA fabric

Friday, May 10, 2024

Field programmable gate arrays (FPGAs), once a territory of highly specialized designs, are steadily gaining prominence in the era of artificial intelligence (AI), and Microchip’s acquisition of Neuronix AI Labs once more asserts this technology premise.

The Chandler, Arizona-based semiconductor outfit, long known for highly strategic acquisitions, has announced to acquire Neuronix, a supplier of neural network sparsity optimization technology that enables a reduction in power, size, and calculations for tasks such as image classification, object detection and semantic segmentation.

The deal aims to bolster the AI/ML processing horsepower on the company’s low- and mid-range FPGAs and make them more robust for edge deployments in computer vision applications. Microchip will combine Neuronix’s neural network sparsity optimization technology with its VectorBlox design flow to boost neural network performance efficiency and GOPS/watt performance in low-power PolarFire FPGAs.

Neuronix AI Labs has been laser-focused on neural network acceleration architectures and algorithms, and Microchip aims to incorporate Neuronix’s AI frameworks in its FPGA design flow. The combination of Neuronix AI intellectual property and Microchip’s existing compilers and software design kits will allow AI/ML algorithms to be implemented on customizable FPGA logic without a need for RTL expertise or intimate knowledge of the underlying FPGA fabric.

Microchip stuck to its FPGA guns even when the Altera-Xilinx duo took over the market before being acquired by Intel and AMD, respectively. Microchip executives maintained all along that FPGAs were a strategic part of its embedded system business. Now, when a plethora of applications continue to populate the edge, Microchip’s vision of embedded systems incorporating low-power FPGA fabrics looks more real than ever.

In short, the acquisition will help Microchip to bolster neural network capabilities and enhance its edge solutions with AI-enabled IPs. It will also enable non-FPGA designers to harness parallel processing capabilities using industry-standard AI frameworks without requiring in-depth knowledge of FPGA design flow.

By: DocMemory
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