Microchip Technology Inc. has announced two significant developments showcasing its commitment to innovation and supply chain resilience. Firstly, the company has expanded its partnership with Taiwan Semiconductor Manufacturing Co. (TSMC), the leading semiconductor foundry, to establish specialized 40-nm manufacturing capacity at Japan Advanced Semiconductor Manufacturing, TSMC’s subsidiary in Kumamoto Prefecture, Japan. This strategic move aims to diversify Microchip’s supply chain and enhance its manufacturing capabilities.

In a separate development, Microchip acquired Neuronix AI Labs to bolster its expertise in power-efficient, AI-enabled edge solutions using field-programmable gate arrays (FPGAs). Neuronix AI Labs specializes in neural network sparsity optimization technology, enabling reduced power consumption, smaller size, and streamlined calculations for applications like image classification and object detection—all while maintaining high accuracy. These initiatives reflect Microchip’s proactive approach to advancing semiconductor technology and expanding its portfolio of cutting-edge solutions.

Michael Finley, senior VP of Worldwide Manufacturing and Technology at Microchip, and Shakeel Peera, VP of Microchip’s FPGA business unit, highlighted the main features of these two announcements.

“Neuronix technology brings to Microchip a wealth of IP, automated tools and compilers that manage sparsity optimization without developer intervention, analyzing models, partitioning them for optimal FPGA use, and producing efficient hardware implementations,” Peera said. “This streamlines the deployment process, enhancing performance and energy efficiency.”

Peera further emphasized that the acquisition of Neuronix AI Labs and the incorporation of their technologies into the VectorBlox toolset would enhance PolarFire FPGA-based AI solutions’ accessibility for designers and software developers. This integration aims to streamline development processes, reduce power consumption, and improve computational efficiency—particularly for intelligent edge applications.

“Having access to the specialized 40-nm manufacturing capacity at JASM gives us a significant advantage in serving our global customer base,” Finley said. “Microchip will be among a very small number of companies with multi-geography supply of TSMC 40-nm specialty technology, which is important to our customers for supply resiliency.”

TSMC

JASM’s offer of wafer capacity enhances Microchip’s capability to cater to a diverse worldwide client base across various industries, such as automotive, industrial and networking sectors.

“In this key 40-nm corridor for Microchip, having manufacturing in two geographies diversifies risk across a range of scenarios. Wafer fabs are already highly reliable with numerous backup and recovery systems, but the likelihood of two sites having significant issues simultaneously is much lower than one, Finley said. “If one site went off-line for an extended time, we would be able to keep producing vital supply from the other site.”

He explained that Microchip’s internal investments target specific wafer sizes (150 mm and 200 mm), which are produced across multiple company sites.

Regarding TSMC’s role, Finley highlights, “TSMC is providing geographical diversity and redundancy for Microchip on 300-mm wafers. The collaboration with TSMC on the 40-nm JASM addition represents an exclusive corridor that diversifies Microchip’s manufacturing capabilities. The 40-nm JASM addition is an exclusive corridor, providing diversification that would not have been an option without the joint TSMC-Microchip plan.”

By being an integrated device manufacturer with both front-end and back-end manufacturing capabilities, Microchip aims to mitigate risks associated with supply chain concentration.

“Reducing concentrations of risk is key, and Microchip’s comprehensive strategy is adding reinforcing layers in targeted areas through both internal and external supply, so that the whole is becoming more durable and resilient,” Finley added.

AI

The key characteristics of PolarFire FPGAs and SoCs are their low power consumption, dependability and security features. By acquiring Neuroxi AI, Microchip will be able to significantly boost the processing capacity of AI/ML on low- and mid-end FPGAs, and create large-scale edge implementations for computer vision applications on systems with budget, size, and power restrictions.

“When you combine a leading-edge FPGA architecture known for its low power consumption with intellectual property specifically designed to reduce computational complexity, the efficiency gains are substantial—particularly in GOPS/Watt for AI/ML applications like convolutional neural networks (CNNs) used in smart vision,” Peera said. “This synergy enables the deployment of space-saving and thermally-efficient systems across a variety of sectors, including medical imaging, surveillance, industrial sensors, robotics, autonomous vehicles and defense applications. Such integrations promise not only to enhance performance but also to drive innovations in critical, resource-sensitive environments.”

The technology leverages patented methods to handle null values efficiently, aligning with PolarFire’s low-power design philosophy. According to Peera, the integration of Neuronix AI’s IP with Microchip’s existing compilers and software design kits (SDKs) is poised to streamline the deployment and optimization of AI models on FPGA platforms.

Peera mentioned that the integration of Neuronix AI’s IP with Microchip’s existing tools, such as the VectorBlox Accelerator SDK—which is currently in progress and will greatly simplify the deployment of AI models on PolarFire hardware for developers of varying expertise levels. The VectorBlox SDK from Microchip is already optimized for accelerating AI algorithms, enabling software developers to work within familiar programming environments like C/C++. It supports various model formats, including TensorFlow and ONNX and features a bit-accurate simulator to validate hardware accuracy in a software environment prior to deployment.

“Additionally, PolarFire FPGAs are designed to be power-efficient while providing up to 50% lower total power consumption compared to competing devices. PolarFire FPGAs feature high-capacity math blocks capable of delivering up to 1.5 tera operations per second, making them suitable for high-performance applications in compact packages as small as 11×11 mm,” Peera said.

This strategic move underscores Microchip’s commitment to address the evolving demands of AI-driven applications in edge computing environments.

By: DocMemory
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