At the 2024 IEEE Symposium on VLSI Technology & Circuits in Hawaii, Intel provided details of the Intel 3 semiconductor process node, the third of five nodes in four years promised under CEO Pat Gelsinger’s IDM 2.0 manufacturing strategy. Intel 3 represents a major step in the Intel Foundry strategy as the first advanced process node joining the Intel 16 mature process node and a precursor to Intel’s angstrom process nodes: Intel 20A and Intel 18A.

These latter process nodes introduce gate-all-around (or what Intel calls RibbonFET) technology, and backside power delivery (or PowerVia) while returning Intel to the forefront of semiconductor manufacturing. These middle process nodes have been viewed by many as just subnodes introducing simple process enhancements. But as Intel demonstrated in a paper at the IEEE Symposium, Intel 3 represents a full node transition in terms of technology and performance efficiency that will benefit both Intel and the rest of the industry.

Semiconductor manufacturing background

Until recently, semiconductor manufacturing process nodes have adhered to the cadence of Moore’s Law. The law states that major enhancements to the three innovation pillars—transistor design, lithography and materials technology—allow semiconductor companies to essentially double the transistor density every two years on average, which leads to improvements in performance and/or power efficiency.

Each node represented semiconductor design geometries—more specifically, their gate lengths—but are now more of a general representation to previous process nodes and about a 15% increase in performance efficiency, on average. In between the process nodes are enhancements to the process, or subnodes, that result from learning during the manufacturing process. These enhancements typically result in up to 5% improvements in performance efficiency, as well as higher yields.

With Intel trying to introduce five nodes in four years, it seemed reasonable to consider some of the nodes as mere subnodes, but that is not the case.

A major foundry achievement

The first thing to point out is the importance of the Intel 3 process node both for internal Intel customers and external foundry customers. As announced with the structure of the Intel Foundry Group, all manufacturing for internal or external customers will now be charged as foundry manufacturing. That means the Intel product groups need to be aware of the cost of manufacturing and Intel foundry needs to be competitive with other semiconductor foundries and make a profit.

In its first financial release of Intel Foundry, Intel went back two years to establish a baseline, which showed a huge loss for Intel Foundry to the tune of $7 billion in 2023. However, Intel predicts that with its new financial structure and the ramping of foundry fabrication and packaging services, Intel Foundry will produce a profit starting by 2030. A major point in that transition is the Intel 3 process node.

While Intel has begun offering manufacturing foundry services on the mature Intel 16 process node at some of its older fabs, the Intel 3 node will mark the first advanced process node for foundry services at its more advanced Oregon and Ireland fabs. Intel 3 is also the process node for manufacturing the new Xeon 6 server processors that will feature versions with both performance (P-core) and efficiency (E-core) versions. There are also external customers on Intel 3, but these details remain under non-disclosure agreements, according to Intel.

As a leading-edge process node—which are in limited supply at this time—Intel 3 will allow Intel Foundry to charge more competitive rates to close the gap to profitability. It will also serve as a critical platform in demonstrating Intel’s ability to be competitive as a foundry, while securing important external foundry customer relationships.

Intel 3, in conjunction with Xeon 6, also stands as a critical point in a transition in Intel’s product strategy, making the Xeon product line more competitive and meeting the needs of evolving data center processor requirements. Intel also plans to leverage the Intel 3 process node for at least a decade, which will provide a process roadmap for other products that do not typically use the leading-edge process nodes, but do migrate to new process nodes over time, such as those used in industrial and consumer IoT applications.

What is the Intel 3 process node

As discussed, Intel 3 is more than the subnode that many in the industry had anticipated. Intel 3 is the first process node where Intel will introduce several versions of the process for different applications/market segments. The first will be the base processes known as Intel 3 and Intel 3T. The “T” stands for through silicon vias (TSVs), which are vertically oriented electrical connections that enable high-speed interconnects between chip elements or between stacked chips.

Intel will be leveraging TSVs on the Xeon 6 product line to mount the die to the silicon interposer/base die, but it could also be used for die stacking. The Intel 3E process can be used for chips requiring analog processing for applications like storage controllers. Some of the enhancements for Intel 3E include native 1.2-V gates, deep N-Well for quiet noise isolation, and long channel analog devices.

Lastly, the Intel 3PT process is for AI, high-performance computing (HPC) and general computing applications. It is a superset of Intel 3 processes with other performance enhancements like narrower pitch TSVs, hybrid bonding and support for high voltages. The Intel 3 process generation will achieve up to an 18% higher increase in performance efficiency (performance/watt) over Intel 4, with an additional bump of a percentage or two for Intel 3PT, even higher than the historical average of 15%, according to the company.

This performance enhancement comes with changes to all three of the innovation pillars, thus making Intel 3 a true process node jump as opposed to just a subnode enhancement. In terms of transistor design, Intel improved the transistor fin profile to be thinner with better contact structures, while offering the high-performance 3×3 fin profile and 240 cell height of the Intel 4 process with a new 2×2 fin configuration, a wide metal zero at the cell boundaries, and a denser 210nm cell height.

The result is better control of the transistor at lower voltages and frequencies, higher transistor performance and density, and lower leakage—the key metrics to improving transistor performance efficiency. Although, it is only with the 210nm cell libraries that you get improved transistor density over Intel 4. Other enhancements include three metal layer options (14, 18 and 21) with optional interconnect stacks, more power routing at the higher layers, and improved resistance and capacitance of the M1-M6 layers.

In terms of process technology, Intel 3 will use the second generation of EUV for more steps to reduce the overall number of process steps, while improving the design constructs. In addition, Intel indicated changes in materials technology, but since this is considered a secret sauce, no additional details were provided.

Changes in materials have sometimes been a difficult task from one process node to the next, as what works well on one process node may not work as well on another. However, as Gelsinger has indicated, “[Intel] will not rest until the periodic table is exhausted.”

All the technical details are available in a paper presented at the IEEE Symposium on VLSI Technology & Circuits. You can also watch a presentation of the paper hosted on Intel’s blog site.

While the Intel 3 does build on the Intel 4 process, the enhancements are significant and results in a 15% improvement in front-end ring oscillator performance, a 20% reduction in overlap capacitance, a 25% reduction in contact line resistance, a 5× reduction in leakage at the same drive current, and an overall increase of up to 18% performance efficiency at the same power over Intel 4, which achieved a 20% increase in performance efficiency over Intel 7. Intel 3 can achieve these performance gains while also enabling 3D packaging, analog devices, and even higher performance products for AI and HPC.

What Intel accomplished was a major process node transition from Intel 4 to Intel 3 in less than a year with the next two processes nodes, Intel 20A and Intel 18A, scheduled to enter production by the end of 2024.

By: DocMemory
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