Yole Group investigated flagship smartphone application processors and published a summary of the analysis in a study titled “APU – Smartphone SoC Floorplan Comparison 2024.” The study crossed multiple technical fields, from foundry technology to packaging and cost analysis, with particular emphasis on system-on-chip architecture. To understand the competitive landscape for mobile processors, the report featured the following products:

*Apple A17 SoC in iPhone 15 Pro

*Google Tensor G3 SoC in Pixel 8 Pro

*HiSilicon Kirin 9000s SoC in Huawei Mate 60 Pro

*MediaTek Dimensity 9300 SoC

*Qualcomm Snapdragon 8 Gen 3 SoC

*Samsung Exynos 2400 in Galaxy S24 SM-S921U1

*These are the most recent designs from top device manufacturers, although this highly competitive field sees new products appearing regularly. (For example, we can expect the next Apple A-series device in the traditional September iPhone launch.)

There is commonality between the six design groups but also key differences to their approaches.

This class of processors all depends on Arm designs. Beyond a bit of mixing and matching within the different designs, the most notable difference is that Apple designers use Arm IP but assemble the logical functions into their own physical designs. Other silicon teams prefer to streamline the process by using hard macros from Arm. Apple spends more effort in the process of optimizing the design, but they are also the only company responsible for both the hardware and software of a single brand. The extra effort of physical design makes the most sense for Apple processors.

The A17 design stands apart in other details, as well. The standard approach to CPU architecture is to have performance cores for the most demanding tasks and smaller efficiency cores to operate with lower power consumption whenever appropriate. The Apple A17 performs the most intense software operations with the lowest core count—just a dual-core design.

On the other end of the spectrum, MediaTek deploys the most powerful CPU in the Dimensity 9300. This APU contains four of the supersize cores that other designs tend to use only as a single main core supported by smaller high-performance cores. The Dimensity 9300 has a complete high-performance quad-core section of Arm Cortex-X4 cores. For power-saving functions, MediaTek prefers the Cortex-A720 core (typically used for high-performance operations) rather than one of the efficient Arm variants.

Since sanctions on advanced lithography and other foundry tools were first enforced on China, many have speculated that Chinese domestic fabs, such as SMIC, and design companies like HiSilicon would find innovative ways to compete. Yole Group’s survey comes at an interesting time as the HiSilicon Kirin 9000 is the first major chip design since the company was forced out of TSMC’s more advanced technology and back to China.

SMIC built the Kirin 9000 on a lagging node (7 nm) compared to 3 nm (TSMC for Apple) and 4 nm (Samsung for its own and Google processors, and TSMC for Qualcomm and MediaTek). That might suggest the HiSilicon design would be among the largest chips. However, MediaTek’s processor has the biggest die despite being built on the much more advanced TSMC 4-nm platform. Although the TSMC 4-nm process increased transistor density, MediaTek’s design with four of the largest Arm X4 cores necessitates expansive use of silicon.

It would be misleading to highlight the Dimensity 9300 die size without more context. It is only slightly larger than the comparable designs of Google, Qualcomm and Samsung. Functionally, the MediaTek design is a peer of Qualcomm and Samsung since these three all include an on-chip modem. Google’s design strategies leave it among the group of largest dies even while excluding modem functionality—a design decision reducing the Apple A17 design to only 109.6 mm.

The HiSilicon chip is the smallest in the group—a couple of square millimeters smaller than the Apple A17. This is more confusing considering that the Kirin 9000 includes a modem while Apple does not (and in light of the relatively large, modem-less Google die).

The contrast between Apple and HiSilicon is starker when weighing the fact that one is manufactured on the most advanced foundry technology while the other is on the most trailing edge of the group. It is worth repeating that the Kirin includes a modem block.

The manufacturing limits placed on China with the U.S. technology sanctions forced HiSilicon to make design changes to retain a reasonable chip size while including an integrated modem in the floor plan. The Kirin 9000 compromises in several places to free up real estate for the modem. Perhaps some benchmarks with others in this cohort will explain it in more detail as the 9000 lags in various compute benchmarks. In fact, several performance and power consumption benchmarks are worse than its predecessor—something that can be attributed to the trailing process technology compared to the Kirin 9000 generations.

The Kirin 9000 shaves area from all the main compute blocks: CPU, GPU, NPU and system SRAM. That leaves it the smallest of the die sizes even with a trailing edge process. But the limitations are obvious considering the transistor count estimates. With the most advanced process in the group, the Apple A17 includes about twice as many transistors as the Kirin chip.

The HiSilicon Kirin 9000 is the smallest even though it is produced in a trailing edge Chinese domestic foundry. On the other end of the die size spectrum, the MediaTek Dimensity 9300 packs a big punch with four Arm Cortex-X4 cores. There are many twists and turns, as well as chip partitioning and placement tradeoffs when comparing these top-tier smartphone processor designs. A complete understanding requires more time and space.

By: DocMemory
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