The rapid increase in silicon carbide (SiC) semiconductor production has spurred significant advancements in process technology to address challenges and leverage SiC’s benefits. Key improvements in SiC materials include enhanced crystal quality, reduced defectivity and better yields.

In the context of chemical-mechanical planarization (CMP), advancements like reduced stress, which impact wafer shape—particularly bow and warp—are crucial, as they can pose significant wafer handling and processing challenges. These technological advancements have a profound impact on the economics of SiC production. Yield is a critical economic factor for all semiconductor-related commercial considerations, and this is especially true for SiC.

Last month, CMP equipment provider Axus Technology announced an influx of sales for the company’s Capstone CS200 Series processing tool, representing renewed interest in volume production of both 150 mm and 200 mm SiC wafers. The CS200 series is able to simultaneously process two different wafer sizes, which can facilitate industry-high throughput and yields.

Improvements in SiC technology and CMP processes result in higher wafer quality, leading to increased yields. Additionally, enhancements in cost of ownership and productivity contribute to lower manufacturing costs. These factors collectively drive market adoption, significantly influencing key SiC applications, such as EVs, renewable energy and high-power electronics.

The value of SiC

SiC wafers, as third-generation semiconductor materials, are highly valued for their performance in high-temperature, high-frequency and high-power applications. Demand for SiC wafers is rising, particularly in electric vehicles, photovoltaic power generation and high-frequency electronic devices. However, their prices remain high and volatile due to several factors.

Firstly, the cost of high-purity carbon and silicon raw materials directly impacts wafer production costs. The complex production processes, including physical vapor transport (PVT) and chemical vapor deposition (CVD), also contribute to high costs due to the technical difficulty and equipment requirements. Larger wafer sizes, such as 150 mm and 200 mm, are more challenging to produce, further increasing costs.

High-quality SiC wafers, which feature low defect density and high electrical conductivity, are expensive to produce due to the advanced technology required. Market demand and supply dynamics significantly influence prices, with shortages driving prices up. Technological advancements and larger production scales can reduce costs over time. Government policies and subsidies also play a role in influencing prices by reducing production costs for companies. Lastly, supply chain factors, including raw material supply and logistics, can impact final wafer prices.

Understanding these factors is crucial for enterprises to make informed production and market planning decisions.

Chemical-mechanical planarization

CMP processing for SiC device wafers presents significant challenges compared to silicon, due to the material’s complex properties. SiC wafers are brittle, necessitating specialized carriers and handlers to minimize breakage. Nearly as hard as diamonds, SiC requires longer processing times and more aggressive conditions and chemistry.

With a wide-bandgap (WBG), SiC wafers are highly transparent, complicating the sensing of wafer presence and position during processing. SiC wafers are half as thick as silicon wafers, making them harder to retain during processing and more prone to cracking and chipping. Due to their thinness, SiC wafers are susceptible to stress, leading to bow and warp issues that require advanced handling technology and flexible system architecture.

Dan Trojan (Source: Axus Technology)

In an interview with EE Times, Axus Technology CEO Dan Trojan highlighted how Axus’ approach to CMP significantly diverges from traditional methods, especially when dealing with WBG materials like SiC and gallium nitride (GaN). According to Trojan, the company’s Capstone platform epitomizes this innovation with its unique architecture, offering highly flexible and efficient processing scenarios essential for advanced CMP capabilities. Traditional CMP tool designs, having been rooted in long-term industry usage, did not anticipate the specific demands posed by WBG materials.

“The combination of advanced tool architecture and the development and integration of new supporting technologies enable significantly improved consumables utilization,” Trojan said. This enhancement reduces process costs while improving both process and product quality. WBG materials present new wafer handling challenges, such as the need for double-sided processing and managing the fragility of wafers. These challenges arise from the inherent properties of WBG substrates, including their thickness, brittleness, stress and susceptibility to subsurface damage.

A primary challenge in optimizing WBG processing is in-situ process temperature control, necessitated by the higher hardness of WBG materials—which requires more aggressive process conditions. Furthermore, the transition from 150-mm to 200-mm wafers among SiC substrate manufacturers presents numerous challenges. Capstone’s architecture facilitates processing both wafer sizes interchangeably and even simultaneously, without the need for hardware, software, or process/consumables changes. “This capability greatly accelerates and simplifies the work needed to accomplish this transition successfully,” Trojan said.

Capstone is also notable for being the only SiC-capable CMP system offering integrated post-CMP cleaning—a critical feature for achieving low-defect post-CMP substrates and optimizing yield and process efficiency. Incorporating state-of-the-art technologies in control system execution speed, distributed control architecture, MES integration, advanced data collection and standards compliance, Capstone stands in contrast to legacy CMP systems that depend on more mature technologies.

Axus Capstone CS200ia (Source: Axus Tech)

CMP tech advances boost SiC and GaN adoption

The integration of SiC and GaN in high-power applications has been marred by significant planarization challenges, primarily due to their highly differentiated material properties. “High hardness dictates substantially more aggressive process conditions, which we can address by means of our PTC technology,” Trojan said. PTC, or Process Temperature Control, technology enables processing at higher pressures and speeds without surpassing the temperature limits of the polishing pad and other sensitive components.

Additionally, advancements in SiC device manufacturing are leveraging process improvements like post-epi CMP for enhanced epi layer surface quality and thickness uniformity. Device-layer CMP is also used to improve within-die topography, enabling larger area device features and enhancing device yield. These improvements are essential for the performance and reliability of WBG materials in high-power applications.

Reducing time-to-market for SiC and GaN chips is another critical focus. Cost is a significant factor, especially for WBG devices where the substrate cost can account for up to 50% of the overall device cost. “For silicon-based devices, the portion of overall device cost attributable to the cost of the substrate itself is nearly negligible,” Trojan noted. However, for WBG devices, reducing manufacturing costs is pivotal.

Axus’ CMP technology plays a crucial role in this aspect. “With Capstone’s efficient architecture, high throughput, and efficient consumables utilization, Axus Technology can deliver advanced single-wafer SiC CMP performance with a corresponding cost-of-ownership that is less than half that of our competing tools and processes,” Trojan said. This significant reduction in manufacturing costs is critical for accelerating the adoption of WBG devices in markets like AI and EVs.

The advancements in CMP technology not only enhance the performance and reliability of SiC and GaN materials, but also contribute significantly to reducing the overall manufacturing costs, thereby facilitating their broader adoption in rapidly evolving industries, according to Trojan.

Innovation

Axus has achieved higher material removal rates by employing PTC technology, which reduces and controls the CMP process temperature in real time. Moreover, surface uniformity is optimized through their patented multizone membrane crystal carriers. These carriers enable precise control of the material removal profile across the wafer, facilitating the processing of fragile wafers with minimal yield loss. Additionally, process control and stability are enhanced through integrated metrology options coupled with run-to-run control functionality.

Feedback from industry partners and early adopters of Axus’ CMP solutions has been overwhelmingly positive. One notable success story involves their collaboration with customers in evaluating various CMP equipment and process solutions for SiC CMP. “We’re quite pleased and proud to say that all these evaluation activities have resulted in the selection of Capstone as the best solution for WBG CMP,” Trojan said. Customers have praised Axus for being a “right-sized” supplier, possessing the optimal scale and resources to meet current and future needs in advancing WBG CMP capabilities.

According to Trojan, larger OEMs often lack the agility required to drive new advancements critical for continuous improvements in WBG materials processing and cost efficiencies. Conversely, smaller suppliers may not have the support infrastructure or financial stability necessary for ensuring ongoing technical and commercial success. Axus strikes a balance, offering the agility of a smaller company while providing robust support akin to larger OEMs.

Effective collaboration between consumables and equipment suppliers is vital in the CMP industry, particularly for WBG materials processing. “We consider the extensive engagement we enjoy with essentially all leading CMP consumables suppliers supporting WBG materials processing as validation of our leadership position in this space,” Trojan added. This collaborative approach underscores Axus’ commitment to advancing CMP solutions for the semiconductor industry.

By: DocMemory
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