With the industry’s first mass production of QLC 9th-generation V-NAND, following the industry’s first triple-level cell (TLC) 9th-generation V-NAND production in April this year, Samsung has taken a major step forward in delivering high-capacity, high-performance NAND flash to the market.

“Kicking off the successful mass production of QLC 9th-generation V-NAND just four months after the TLC version allows us to offer a full lineup of advanced SSD solutions that address the needs for the AI era,” said SungHoi Hur, Executive Vice President and Head of Flash Product & Technology at Samsung Electronics. “The enterprise SSD market continues to show rapid growth with stronger demand for AI applications.”

Samsung plans to expand applications of the QLC 9th-generation V-NAND, starting with branded consumer products and extending into mobile Universal Flash Storage (UFS), PCs and server SSDs for customers including cloud service providers.

The QLC 9th-generation V-NAND brings together several innovations that have produced technological breakthroughs:

Channel Hole Etching technology was used to achieve a higher layer count with a double stack structure. Utilising the technological expertise gained from the TLC 9th-generation V-NAND, the area of the cells and the peripheral circuits have been optimised, achieving a higher bit density approximately 86% higher than that of the previous generation QLC V-NAND.

Designed Mold technology adjusts the spacing of Word Lines (WL), which operate the cells, to ensure uniformity and optimisation of cell characteristics across and within layers. These traits have become increasingly important as the V-NAND layer counts increase. Adopting Designed Mold has improved data retention performance by roughly 20% compared to previous versions, leading to enhanced product reliability.

Predictive Program technology anticipates and controls cell state changes to minimise unnecessary actions. Samsung’s QLC 9th-generation V-NAND has doubled write performance and improved data input/output speed by 60% through advancements to this technology.

Data read and write power consumption decreased by about 30% and 50% respectively, with the use of Low-Power Design technology. This method reduces the voltage that drives NAND cells and has help to minimise power consumption by sensing only the necessary bit lines (BL).

By: DocMemory
Copyright © 2023 CST, Inc. All Rights Reserved