Wednesday, December 4, 2024
At electronica 2024 in Munich this year, some of the key themes I heard often were around modularity and scalability. In the automotive industry, the cost and time of development of the systems and software makes these characteristics even more significant, as auto manufacturers come to terms with the race between launching new vehicles to market and offering new advanced features to customers.
With more system complexity due to growth of advanced driver assistance systems (ADAS), software-defined vehicles (SDVs) and EVs, automotive OEMs and Tier-1s are increasingly looking at ways of reusing hardware and software platforms across their range—from entry to mid-range, premium and luxury—to optimize costs and return on engineering investment.
In a briefing ahead of the launch of Renesas Electronics latest automotive SoC, Vivek Bhan, senior VP and general manager of high-performance computing (HPC) at the company, told EE Times, “The key [automotive] players we are talking to want full scalable solutions, from high-end to low end.”
To address this need, Renesas announced details of the first device in its R-Car Gen 5—whose initial plans were announced a year ago—last month: the new R-Car X5H SoC. The main premise of this new automotive multi-domain SoC built with 3-nm process technology is that it serves multiple automotive domains, including ADAS, in-vehicle infotainment (IVI) and gateway applications on a single chip. In other words, one SoC platform to scale for the entire vehicle fleet with R&D efficiency, as well as tools and software reuse across centralized and domain compute.
Bhan said the R-Car Gen5 unifies Renesas’ HPC roadmap to bring a fully scalable lineup from MCU to SoC with a common Arm architecture. “Gen 5 brings the Arm based SoCs and the RH850 MCUs onto a single software toolchain. Hence, we are uniquely placed to service everything from MCU to ADAS,” he added.
Renesas said this new SoC offers the highest level of integration and performance in the industry, allowing OEMs and Tier-1s to shift to centralized ECUs for streamlined development and future-proof system solutions. The company added that the R-Car X5H is among the first in the industry to offer highly integrated, secure processing solutions on a single chip for multiple automotive domains, thanks to its hardware-based isolation technology. The product also provides the option to expand AI and graphics processing performance using chiplet technology.
To get a sense of perspective on Renesas R-Car families, the new SoC is the premium end of the Gen 5 family, with other SoCs in Gen 5 planned over time. The current Gen 3 series is already in production, and Gen 4 will start to ramp up production in 2025.
Renesas said the R-Car X5H directly addresses the growing complexity of SDV development. These challenges include optimizing compute performance, power consumption, cost, and hardware and software integration—while ensuring vehicle safety. By tightly coupling application processing, real-time processing, GPU and AI compute, large display capabilities, and sensor connectivity on a single chip, these devices enable a new class of automated driving, IVI, and gateway applications, the company said.
The new SoC series also enables AI acceleration of up to 400 TOPS with what Renesas claims is industry-leading TOPS/W performance, and GPU processing of up to 4 TFLOPS. The product incorporates a total of 32 Arm Cortex-A720AE CPU cores for application processing, delivering over 1,000K DMIPS performance, as well as six Arm Cortex-R52 dual lockstep CPU cores delivering over 60K DMIPS performance with support for ASIL D capabilities without external MCUs.
Manufactured using one of TSMC’s most advanced process nodes, the new SoC series achieves both top-end CPU performance and a 30-35% reduction in power consumption compared to devices designed for a 5-nm process node. These power-efficient features significantly lower overall system costs by eliminating the need for additional cooling solutions—while also extending vehicle driving range.
Speaking for the analyst firm TechInsights, Asif Anwar, executive director for the automotive market, said, “The path to the SDV will be underpinned by the digitalization of the cockpit, vehicle connectivity, and ADAS capabilities. The vehicle electric/electronic architecture will be the core enabler as features and functions are integrated into zonal and centralized controllers that will provide the necessary compute capabilities. TechInsights forecasts the zonal controller and high-performance compute SoC processor market will grow at a CAGR of 17 percent between 2028 and 2031.”
He added that Renesas is a top three supplier of automotive processors and is leveraging decades of experience with its fifth-generation R-Car X5H SoC that will scale with the requirements of an SDV.
“By leveraging the 3-nm process, the R-Car X5H SoC allows the automotive industry to implement a multi-use solution set that can be used across the vehicle platform with optimized power budgets. Combining this with the RoX [R-Car Open Access] SDV platform, Renesas can offer a software-first, cross-domain approach that will shorten the time-to-market for the automotive industry,” Anwar said.
Bhan emphasized the key aspects of the new SoC: scalability, flexibility, power efficiency and mixed criticality. The modular nature—for example, adding an NPU chiplet for the ADAS domain ECU, or a GPU chiplet for the cockpit domain ECU, in a single SoC package, using an integrated UCIe interconnect—ensures flexibility.
Chiplets add flexibility
While the R-Car Gen 5 SoCs come with native NPU and GPU processing engines, Renesas said it is offering customers the ability to scale up their performance through chiplet extensions. When combining a 400-TOPS on-chip NPU with an external NPU via a chiplet extension, for example, it is possible to scale AI processing performance by three to four times or more.
For seamless chiplet integration, the R-Car X5H offers the standard UCle die-to-die interconnect and APIs, facilitating interoperability with other components in a multi-die system, even if they are non-Renesas chips. This flexible design approach allows car OEMs and Tier-1s to mix and match different functions and customize their systems, including future upgrades across vehicle platforms.
Mixed-criticality processing
Renesas said that while other SoCs rely solely on software-based isolation, the R-Car X5H SoC offers hardware-based freedom from interference (FFI) technology. This hardware design implementation securely isolates safety-critical functions, such as brake-by-wire, from non-critical functions.
Functions deemed safety critical can be assigned their own separate, redundant domains, each having its own independent CPU core, memory and interfaces, thus preventing potentially catastrophic vehicle failures in the event of a hardware or software fault from a different domain. The R-Car X5H also comes with quality-of-service management that determines workload priorities and assigns processing resources in real time.
Bhan told EE Times that the R-Car X5H will be sampling to key customers in Q2 of 2025, with production scheduled in the first half of 2027.
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