LPDDR5 and LPDDR5X will now be succeeded by JEDEC's newest memory standard, LPDDR6. The company has introduced LPDDR6 memory for mobile platforms, aiming for high performance and power efficiency. The new memory standard will be deployed across various sectors, including AI edge computing, client systems, servers, and the automotive industry, to bring additional benefits to these devices.

The LPDDR6 memory brings various improvements over the LPDDR5 and LPDDR5X by introducing Dual Sub-Channel Architecture, bringing two sub-channels per die, each with 12 DQs, and supports flexible 32B and 64B burst lengths. Compared to LPDDR5, which has 16 DQ (2x8) lines per channel, the LPDDR6 reduces it to 2x 12 for better latency and access speed optimizations.

For power efficiency, the LPDDR6 will use lower voltage to reduce dynamic power consumption and brings features like DVFSL (Dynamic Voltage Frequency Scaling for Low Power) to adjust voltage during low-frequency operations. With Dynamic Efficiency Mode, LPDDR6 will allow a single sub-channel operation for low-power states, and this brings noticeable improvements over LPDDR5 when it comes to power efficiency.

For Security and Reliability, LPDDR6 brings ECC (On-Die Error Correction), CA Parity + MBIST, PRAC (Per Row Activation Counting), and Meta Region Carve-out features, ensuring data integrity, catching memory errors, and various enhancements in reliability.

The new LPDDR6 standard will be deployed in multiple sectors for improved performance and efficiency, and companies like MediaTek, Micron, Samsung, SK Hynix, and Qualcomm Technologies will be the first to adopt the newer memory standard.

By: DocMemory
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