According to MediaTek it will be taping out its new flagship system-on-chip (SoC) with volume production expected late next year. MediaTek has not officially named the chip, but it is likely to be the next-generation Dimensity 9 series - the Dimensity 9600.

The announcement marks a significant new milestone in the strong partnership that exists between MediaTek and TSMC, and which has yielded high performance, power-efficient chipsets for customers across mobile, compute, automotive, and data centre applications among others.

TSMC’s 2nm technology is the first to adopt nanosheet transistor structure, and N2P represents the next evolution in the 2nm family, which is set to deliver improved performance and power efficiency. The first chipset utilising the new TSMC N2P process is expected to be available in late 2026.

TSMC is actively expanding its production capacity, including 2nm and WMCM (Wafer-Level Multi-Chip Module) lines and it’s been suggested that 2nm output could reach 40,000 wafers per month by year-end and nearer 100,000 wafers in 2026.

Compared with the existing N3E process, N2P users will see as much as an 18 percent increase in performance at the same power, an approximately 36 percent power reduction at the same speed, and a 1.2x increase in logic density.

“MediaTek’s innovations powered by TSMC’s 2nm technology underscores our continued push forward with the most advanced semiconductor process technologies available for a variety of devices and applications,” said Joe Chen, President of MediaTek. “Our close collaboration with TSMC has led to incredible advancements in solutions for our global customers, offering the highest performance and power efficiency from the edge to the cloud.”

“N2P represents a significant step forward in the nanosheet era for TSMC, demonstrating our relentless tuning and improving of our technologies to deliver energy-efficient computing capability,” added Dr. Kevin Zhang, Senior Vice President of Business Development and Global Sales and Deputy Co-COO of TSMC. “Our ongoing collaboration with MediaTek focuses on maximising enhanced performance and power capabilities across a wide range of applications.”

AMD’s upcoming Venice is expected to be the first HPC product to be built on TSMC’s 2nm process, while NVIDIA is said to be planning to adopt the A16 chip in its next-gen Feynman architecture - making it one of the first 2nm adopters as well.

By: DocMemory
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