The tape-out was conducted at onsemi’s 300mm production fab in East Fishkill, NY and the chips are being developed in onsemi’s Treo platform, which is a 65nm Bipolar-CMOS-DMOS (BCD) process.

Onsemi, which is a US based company, is a developer of a broad range of intelligent power and sensing solutions that are suitable for the automotive, industrial and AI data centre markets.

This tape-out is being described as a key milestone for Weebit, that will enable its ReRAM IP on onsemi’s Treo platform. For Treo-based designs, Weebit’s ReRAM can provide ultra-low-power, high density NVM that will help to unlock new levels of intelligence and functionality.

onsemi’s next-generation products are expected to use this memory technology and the test chips will now be used for final testing and qualification ahead of anticipated volume production.

Commenting Coby Hanoch, CEO of Weebit Nano, said: “Our collaboration with onsemi is progressing rapidly, and this successful tape-out marks a major milestone in completing the technology transfer of Weebit ReRAM to onsemi’s advanced BCD process. We’ve already validated our technology on multiple wafer lots using onsemi’s tools and flow, optimising the process and demonstrating solid performance and reliability. We’re now progressing towards qualification.”

By: DocMemory
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