Rapidus is also preparing to begin work on 1.4nm process technology in 2026, with mass production targeted for around 2029, signalling Japan’s continued ambition to establish a competitive position in leading-edge chip fabrication.

TSMC, meanwhile, is expected to advance more quickly. Its first 1nm facility at the Central Taiwan Science Park is reportedly on track to complete risk trial production by the end of 2027, before entering volume manufacturing in the second half of 2028.

In the nearer term, Rapidus plans to start producing customer-designed 2nm test chips by late 2026, an important step toward its goal of initiating mass production in 2027. Interest in its early 2nm work is said to be strong, particularly from US companies focused on artificial intelligence, as well as customers in Japan and Europe.

The company demonstrated operational 2nm transistors at a customer event in July 2025, though performance at the time did not yet meet expectations. By September 2025, engineers began refining key characteristics, with improvements progressing far faster than earlier development efforts undertaken at IBM’s Albany research site in New York. Work that had previously taken around 18 months in Albany was completed in under two months at Rapidus’s Chitose plant in Hokkaido, highlighting the company’s accelerated development pace.

The broader landscape of Japan’s semiconductor industry is also shifting. In February 2026, the Yomiuri Shimbun reported that TSMC had finalised plans to begin mass production of 3nm chips in Kumamoto Prefecture, marking the first time such advanced semiconductors will be manufactured in Japan. The project is expected to involve about $17 billion in capital investment.

Despite both companies pushing forward at the leading edge, the Japanese government reportedly believes that Rapidus and TSMC will serve different market segments, given the varied applications for 3nm and 1nm-class chips. As a result, officials do not see the two ventures as being in direct

By: DocMemory
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