design, verification, simulation and manufacturing enablement, with the aim of helping customers manage rising design complexity, shorten development cycles and increase the likelihood of first-pass silicon success.

“Samsung Foundry continues to work closely with Siemens to support customers with robust, manufacturing-ready design flows across advanced process technologies,” said Hyung-Ock Kim, vice president and head of the Foundry Design Technology Team at Samsung Electronics. “Through our collaboration within the SAFE ecosystem, we are aligning proven EDA solutions with our process platforms to help customers address increasing design complexity, improve verification confidence, and accelerate innovation from design through manufacturing.”

Ankur Gupta, executive vice president of the IC Portfolio at Siemens EDA, said the collaboration reflects a shared focus on enabling production-ready design. “By working closely with Samsung, we are helping mutual customers to manage design complexity and bring innovative products to market with greater confidence,” he said.

As part of the expanded collaboration, the companies are advancing support for photonic integrated circuit (PIC) design, a growing area driven by demand for high-speed data and optical interconnects. Using Siemens’ Calibre software, the joint solution provides capabilities such as equation-based design rule checking, verification of curvilinear layouts and pattern matching. These features are intended to improve the accuracy and manufacturability of increasingly complex photonic designs.

Siemens’ Calibre nmPlatform suite, including tools for design rule checking, layout versus schematic verification and parasitic extraction, has also been fully qualified for Samsung Foundry processes. In addition, the two companies are addressing power integrity challenges through automation. Samsung Foundry plans to release Calibre DesignEnhancer Pge for its 2nm node, which can automatically optimise power grids and mitigate issues such as electromigration and voltage drop during layout.

The collaboration extends to design-for-test (DFT) methodologies, where Siemens’ Tessent tools are being used to support advanced-node yield analysis. This includes the development of a high-resolution chain diagnosis flow at Samsung Foundry, enabling more precise fault detection and failure analysis at the silicon level.

In advanced packaging, Samsung Foundry is adopting Siemens’ Innovator3D tools for its 2.3D Cube-E platform. These tools support early-stage floorplanning and automated layout generation for designs with high pin counts, alongside verification of complex 2.5D and 3D integrated circuit structures.

For analogue and mixed-signal design, Siemens’ Solido Simulation Suite has been qualified across Samsung Foundry nodes, including for automotive applications at 4nm and 2nm. The tools support detailed simulation, reliability analysis and model validation across a range of process technologies.

In digital implementation, Siemens’ Aprisa software has been certified for Samsung’s advanced nodes, with ongoing optimisation aimed at improving performance, power and area efficiency.

The expanded collaboration reflects broader industry trends, where increasing design complexity and advanced process scaling are driving closer integration between foundries and EDA providers

By: DocMemory
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