Tuesday, December 3, 2002
Toshiba and Sony announced the world's first 65-nm CMOS process technology for embedded memories.
The process technology will enable single-chip devices, said to be one-fourth the size of current embedded chips in the market.
The process also enables a 30-nm transistor with the world's fastest switching speeds, as well as the world's smallest cell for embedded DRAM and SRAM.
Toshiba and Sony have utilized 65-nm process to fabricate an embedded DRAM with a cell size of 0.11um2, which will enable a 256-megabit memory to be integrated on a single chip. It also fabricated the world's smallest embedded SRAM cell of only 0.6um2.
The technology will bring the market towards what the companies call “ubiquitous computing,” that is, total connectivity at all times, according to Toshiba and Sony.
By: DocMemory
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