Tuesday, February 4, 2003
Texas Instruments Inc,announced delivery of a fully-functional wireless digital baseband from its next-generation, 90-nanometer process.
By shrinking the dimension of the transistors' power consumption, size and manufacturing costs are reduced relative to the previous manufacturing process. Distances between transistors are also reduced, increasing overall processor performance and allowing integration of many more features on an equivalent size chip.
Dr Hans Stork, senior vice president and director of TI's silicon technology development, said, "Our R&D investment has led to the development of a set of very advanced CMOS processes that deliver the integration and circuit optimization required to match device architectures with the targeted application area."
The 90nm process features transistors as small as 37nm, a width 2,000 times smaller than the thickness of newsprint. With the ability to pack over 400 million transistors on a single chip, the technology is driving cost-effective, system-on-chip (SoC) solutions with high levels of performance and power savings for TI products.
With up to nine layers of copper metal, the process also supports integration of a range of analog and radio frequency (RF) components for SoC development. Integration of analog and RF components for communication transmit and receive functions, and for analog-to-digital and digital-to-analog conversion circuits, is critical to a wide range of signal processing applications.
The 90nm process integrates a low-k dielectric, organo-silicate glass (OSG) that has a k-value (dielectric constant) of 2.8.
In 2005, the company plans to also deliver its 90nm embedded FRAM technology; a low cost, high density, low-power, non-volatile memory alternative.
By: DocMemory
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