Monday, April 28, 2003
The TSMC released 2004 roadmap for higher advanced process technology during their TSMC 2003 Technology Symposium. TSMC presented the first details of its 65-nm technology for use in next-generation designs starting in late 2004 according to Jack Sun, TSMC's senior director of logic technology.
TSMC's roadmap also calls for the use of silicon dioxide as the gate dielectric in the first phase of the 65-nm node. TSMC also include in the symposium are the expansion of its test and assembly services and additional guidance for chipmakers on how to prevent manufacturing delays. They emphasize more on back-end services with third-party companies in the areas of wafer bumping, wafer sorting and flip-chip packaging.
TSMC is currently ramping up its 130-nm process, with plans to move into "risk production" with its 90-nm technology in the third quarter of this year. TSMC is facing weaker-than-expected demand for some of its most advanced processes and able to ship only 100,000 such wafers by the end of March 2003, which was greatly affected by low demand, unfavorable economic conditions and difficulties qualifying the process technology.
Expecting to recover in 2005, a full-blown, system-on-a-chip (SoC) platform based on the 65-nm technology by that time and we are back in business, said by Sun.
By: DocMemory
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