The three companies agreed last year to co-develop specifications for CellularRAMs that incorporate low-power features and are drop-in compatible with the asynchronous low-power SRAMs currently used in most cell phone designs.

Each company is manufacturing products using their own design and process technologies and product development timetables. In addition to 32Mbit density components, the co-development roadmap includes plans for 16Mbit and 64Mbit vesions.

Micron is currently sampling 32Mbit and 64Mbit devices, with full production expected in the third quarter of 2003. Infineon is sampling the 32Mbit and also plans volume production in the third quarter of 2003. And Cypress plans to have samples available in the first half of 2004.

Based on a DRAM cell, the CellularRAM architecture provides significant advantages over traditional SRAMs and six-transistor (6T) SRAM cells by leveraging the technology and reduced size of a DRAM cell. The 32Mbit version now sampling operates at up to 104 MHz with low initial latency of 70ns and can achieve up to 208 MB/s (1.5 Gb/s) of peak bandwidth.

The 32Mbit samples are organized as 2Meg x 16. The 16Mbit and 64Mbit density components are organized as 1Meg x 16 and 4Meg x 16.

To ensure full compatibility, the CellularRAM co-development companies are now analyzing and validating each manufacturer's sample products for final verification.

The trio have also started working on the definition of the next generation of the CellularRAM product family, a 128Mbit device which should be sampling in the second half of 2004.

By: DocMemory
Copyright © 2023 CST, Inc. All Rights Reserved