Monday, July 7, 2003
Sharp Corp said it has developed the LHF00L01, a 16M-bit flash EEPROM with a low-pin-count (LPC) interface designed for the BIOS memory of next-generation and mobile PCs.
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The chip is housed in 32-pin TSOP. The package occupies 8mm x 13.4mm. | As the new product contains the LPC interface, LPC-compatible chipsets are connected directly to the memory chips without I/O controllers, resulting in reduced size and lower cost. Sample chips will be available in July, with mass production scheduled for August 2003.
"Among suitable interface standards, the LPC interface has experienced the highest demand, and several chipset manufacturers have begun to support this standard. Moreover, although the conventional 2M-bit to 8M-bit memory capacity of the PC-BIOS is considered adequate, there is a trend toward expanding this capacity to 16M-bit, in line with the increased functionality of CPUs," said Mark Hampson, senior product marketing manager for Sharp Microelectronics of the Americas.
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