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JEDEC to re-design DDR2 buffered memory for servers


Tuesday, July 29, 2003 A task group has formed within JEDEC to work on a standard for fully buffered DDR2 DIMMs aim to be used in the servers. Present buffered DIMMs design will be unable to support larger memory needed for the the upcoming high speed servers running at speeds of 667 to 800Mbits/s, according to a source.

Servers with fully buffered DIMMs would accommodate four DDR2 DIMMs per memory channel. A server using today's memory modules is able to use two DIMMs per channel, in the case of 667Mbit/s DDR2, and one DIMM in 800Mbit/s DDR2, said the source. 

The new DDR2 DIMM would buffer the data lines besides the capacity to buffer the address, control, and clock signals, the source added, allowing more modules to be added onto the server.

The initial concept should be ready by September this year and first new fully buffered DDR2 DIMMs should come in 2005. The new design will possibly include the 'hot-swappable' feature such that DIMMs could be pulled out or put in while the server is still running, the source said.

By: DocMemory
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