The 1-Gbit SDRAM covers DDR data rates from DDR266 to DDR400 operating at 133-MHz to 200-MHz clock frequencies, respectively, the company said.

The new 1-Gbit DRAM is packaged in a standard 400-mil, 66-pin Thin Small Outline Package (TSOP) or a 68-ball Fine-pitch Ball Grid Array (FBGA) for space-constrained applications. Supported organizations are x4, x8 and x16.

"Infineon is proud to again have the smallest die size of an upcoming new DRAM generation," said Harald Eggers, chief executive officer of Infineon's Memory Products Group, in a statement. "This once again impressively underlines the value of our advanced trench-cell DRAM technology in the industry. It enables the most economic production of the new DRAM generations, which will further push out the memory density barrier in high-end servers and workstations and thereby help to improve speed, performance and user-friendliness of today's computers."

To achieve the highest memory density per module, Infineon plans to use a stacked version of the FBGA package to produce 4-Gbyte modules. The technology, called "Dual Die Stack", provides a second silicon chip on top of the first, encapsulating the resulting die stack in a regular, albeit higher, fine-pitch ball grid array package.

The 1-Gbit DDR SDRAM is to be used to offer high-density registered and unbuffered modules for the server and workstation market. Target products include Dual-Inline Memory Modules (DIMMs) of 4-Gbyte and 2-Gbyte density as well as unbuffered DIMMs of 2-Gbyte density. Small-Outline DIMMs (SO-DIMMs) for notebook computers are to be offered in 2-Gbyte and 1-Gbyte densities using the new generation memories, Infineon said.

All the module formats are to start sampling in the fourth quarter of 2003 and enter into volume production early 2004, the company said. The memories are being manufactured initially at Infineon's facility in Dresden.

By: DocMemory
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