Advanced Micro Devices took further steps toward the 45nm node today announcing at the International Conference on Solid State Devices and Materials technology it claims will move the industry to that level ahead of the International Technology Roadmap for Semiconductors (ITRS).

Aiming at 2007 instead of ITRS' 2009, AMD researchers detailed their new triple-gate transistors, based on industry-friendly next-generation silicon-on-insulator (SOI) and advanced metal gate technologies.

"This whole process still uses relatively conventional materials and processes, so it's an advantage when you go to put this into manufacturing, and it has greater compatibility with current designs used today," Craig Sanders, VP of process development at AMD, told Electronic News. "The net of all this is that we end up with a structure that produces 50 percent better performance than anything we've seen before, than any multi-gate structures that have been presented."

That 50 percent performance edge is achieved with maximized transistor switching performance and decreased power-wasting leakage by combining several technologies into a single structure -- in particular, a metal gate.

"One of the things the industry would like to do today I make everything smaller, make the gate dielectric material thinner, make the gate dimension smaller. That scaling allows you to get higher performance at lower voltages at lower powers," Sanders said. " One of the struggles the whole industry is going through is being able to scale the gate dielectric material, because as it gets thinner it starts to leak current," he said, pointing to the lower-leakage advantages of a metal gate.

An ultra-thin electrical path using fully depleted silicon-on-insulator (FDSOI) technology is surrounded on three sides with nickel-silicide metal gates. That combination of FDSOI and nickel-silicide metal gates, Sanders explained, has the effect of straining the silicon lattice within the electrical path to enhance carrier mobility.

The multi-gate, FDSOI structure increases the effective width of the electrical path in the transistor and also provides better electrical control of this path, according to AMD. All of that combines to provide higher ON current, lower OFF current and faster switching, increasing the overall transistor performance