Monday, February 2, 2004
ChipPAC Inc. has completed customer qualification of single-die and stacked-die packages for chips made with 90-nm manufacturing processes.
The packages include a so-called chip-scale package and a ball grid array. The qualification enables the start of high volume assembly and test of 90-nm chips with copper metalization and low-k dielectrics using the same assembly equipment and testers already in use for circuits supplied to the wireless and computer industry, ChipPAC said.
"As designs migrate to 90-nm for higher speed and integration, it is our goal to have ready the technologies and infrastructure needed to package these chips without any compromise to the performance or reliability of the product and make the transition transparent to the customer," said Marcos Karnezos, chief technology officer of ChipPAC, in a statement.
By: DocMemory
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